/home/travis/build/MoarVM/MoarVM/src/jit/emit_posix_x64.c

Source (jump to first uncovered line)
/*
** This file has been pre-processed with DynASM.
** http://luajit.org/dynasm.html
** DynASM version 1.3.0, DynASM x64 version 1.3.0
** DO NOT EDIT! The original file is in "src/jit/emit_x64.dasc".
*/

#line 1 "src/jit/emit_x64.dasc"
#include "moar.h"
#include <dasm_proto.h>
#include <dasm_x86.h>
#include "emit.h"

#ifdef _MSC_VER
#pragma warning( disable : 4129 )
#endif

/**
 * CONVENTIONS

 * Much of this file contains snippets of assembly code, which are concatenated
 * at runtime in order to form a single executable routine. It is essential for
 * the correctness of the result that each of the snippets behaves
 * nicely. Because you can't be expected to know what that is, it is documented
 * here.

 * REGISTERS:

 * Register and calling conventions differ between POSIX and windows
 * systems. The registers rax, rcx, rdx, r8, r9, r10 and r11 are caller-saved,
 * meaning that you are free to overwrrite them, and functions you may call are
 * free to do thesame. Hence you should save their values on stack, if you wish
 * to keep them after calling. In contrast, rbx, rsp, rbp, and r12-r15 are
 * callee-saved, meaning that their values before entering and after returning
 * from a function must be the same. POSIX also makes rdi and rsi caller-saved,
 * windows makes them callee-saved. For this reason we avoid using them.  The
 * first 4 (windows) or 6 (POSIX) function call arguments are placed in
 * registers. These registers sets are not the same between windows and POSIX,
 * but they're always caller-saved.

 * To deal with the ambiguity, register names have been aliased.

 * + RV stands for 'return value', and is aliased to rax
 * + TMP1-6 are the 6 shared caller-saved registers
 * + ARG1-4 are (different) aliases for argument registers
 * + TC, CU, WORK are registers that hold interpreter variables; these are callee-
 *   saved registers set up at entry and restored at exit
 * + TMP5 (r10) is also aliased as FUNCTION; it never conflicts with an argument
 *   register, and neither does TMP6.
 * + The suffixes d, w, and b stand for the 4, 2, and 1 byte-width value of the
 *   registers.

 * Note that the current convention for function calls is to load the function
 * pointer as a 64 bit value in a register from the machine code, and call on
 * that register. This is not ideal, but call doesn't natively take 64 bit
 * values, and it is neccesary to ensure that the function lives within 32 bits
 * distance from the function otherwise. Other methods are being considered.

 * LABELS:

 * Don't use dynamic labels in this code, unless they have been passed to you
 * from outside. Dynamic labels need to be allocated and not conflict, hence
 * just picking one is typically unsafe. You are allowed to use in a snippet
 * the local labels 1-5; the labels 6-9 are reserved by special constructs like
 * THROWISH_PRE and INVOKISH.

 * WRITE BARRIERS:

 * Use of write barriers is tricky, because they may involve a function call, and
 * that may or may not mean you have to store your temporaries on the stack.
 * Hence, a write barrier (MVM_ASSIGN_REF) is split into two parts:

 * + check_wb (root, value, label)
 * + hit_wb (root)

 * You should have the label parameter point somewhere after hit_wb, and save
 * and restore your temporaries around the hib_wb.
 **/


//|.arch x64
#if DASM_VERSION != 10300
#error "Version mismatch between DynASM and included encoding engine"
#endif
#line 74 "src/jit/emit_x64.dasc"
//|.actionlist actions
static const unsigned char actions[3526] = {
  254,0,85,72,137,229,255,72,129,252,236,0,1,0,0,255,76,137,117,252,248,76,
  137,109,252,240,72,137,93,232,255,68,139,159,233,68,137,93,224,255,73,137,
  252,254,73,137,252,245,77,139,158,233,73,139,155,233,255,252,255,226,255,
  248,10,72,199,192,0,0,0,0,248,11,255,76,139,117,252,248,76,139,109,252,240,
  72,139,93,232,255,72,137,252,236,93,195,255,72,185,237,237,72,137,139,233,
  255,72,199,131,233,237,255,73,139,141,233,72,139,137,233,72,137,139,233,255,
  73,139,142,233,72,139,137,233,72,137,139,233,255,72,139,139,233,72,139,137,
  233,255,72,139,137,233,73,139,150,233,72,139,146,233,72,133,201,72,15,68,
  202,255,77,139,158,233,255,77,139,155,233,255,77,139,147,233,255,77,139,146,
  233,255,77,133,210,15,133,244,247,255,76,137,252,247,76,137,222,72,199,194,
  237,254,1,248,5,237,237,254,0,252,255,21,244,5,255,73,137,194,248,1,255,76,
  137,147,233,255,76,139,155,233,77,139,155,233,255,76,137,252,247,255,73,139,
  181,233,72,139,182,233,72,199,194,237,254,1,252,255,21,244,5,72,133,192,15,
  132,244,247,72,139,0,248,1,72,137,131,233,255,73,139,142,233,255,72,139,145,
  233,76,139,131,233,76,137,130,233,255,102,252,247,129,233,236,15,132,244,
  248,77,133,192,15,132,244,248,102,65,252,247,128,233,236,15,133,244,248,72,
  137,206,76,137,252,247,254,1,252,255,21,244,5,248,2,255,73,139,142,233,72,
  139,137,233,72,139,137,233,72,137,139,233,255,72,139,139,233,72,141,145,233,
  76,139,137,233,77,141,145,233,77,133,201,73,15,69,210,255,76,139,2,77,133,
  192,255,15,133,244,249,255,77,139,134,233,77,139,128,233,248,3,255,76,139,
  2,255,77,133,192,15,133,244,250,255,77,139,134,233,77,139,128,233,77,139,
  128,233,255,102,252,247,129,233,236,15,132,244,249,77,133,192,15,132,244,
  249,102,65,252,247,128,233,236,15,133,244,249,72,137,85,216,76,137,69,208,
  72,139,179,233,76,137,252,247,254,1,252,255,21,244,5,76,139,69,208,72,139,
  85,216,248,3,255,76,137,2,248,4,255,76,139,2,77,133,192,15,133,244,250,255,
  76,137,252,247,73,139,182,233,72,139,182,233,72,139,182,233,254,1,252,255,
  21,244,5,73,137,192,255,252,255,21,244,5,76,139,69,208,72,139,85,216,248,
  3,76,137,2,255,76,137,131,233,255,72,139,139,233,72,139,147,233,255,102,252,
  247,129,233,236,15,132,244,248,72,133,210,15,132,244,248,102,252,247,130,
  233,236,15,133,244,248,255,252,255,21,244,5,72,139,139,233,72,139,147,233,
  248,2,255,72,137,145,233,255,72,139,139,233,72,139,145,233,72,137,147,233,
  255,72,139,139,233,72,139,147,233,72,139,137,233,72,137,17,255,72,139,139,
  233,76,139,129,233,73,139,16,72,137,147,233,255,72,139,139,233,72,139,147,
  233,76,141,129,233,73,131,184,233,0,15,132,244,247,77,139,128,233,248,1,255,
  102,252,247,129,233,236,15,132,244,248,72,133,210,15,132,244,248,102,252,
  247,130,233,236,15,133,244,248,72,137,85,216,76,137,69,208,72,139,179,233,
  76,137,252,247,254,1,252,255,21,244,5,76,139,69,208,72,139,85,216,248,2,255,
  73,137,144,233,255,72,139,139,233,72,137,139,233,255,72,139,139,233,73,137,
  142,233,255,73,139,142,233,72,131,252,249,0,15,132,244,248,73,139,150,233,
  72,131,252,250,0,15,132,244,247,77,139,134,233,77,139,128,233,76,57,194,15,
  133,244,248,248,1,72,137,139,233,73,199,134,233,237,252,233,244,249,248,2,
  73,139,142,233,72,139,137,233,72,137,139,233,248,3,255,73,139,142,233,72,
  139,137,233,72,133,201,15,132,244,247,72,139,137,233,248,1,72,137,139,233,
  255,73,139,141,233,255,72,199,131,233,0,0,0,0,255,72,139,139,233,72,133,201,
  15,148,210,72,15,182,210,72,137,147,233,255,72,129,131,233,239,255,72,129,
  171,233,239,255,72,129,139,233,239,255,72,129,163,233,239,255,72,129,179,
  233,239,255,72,139,131,233,255,72,1,131,233,255,72,41,131,233,255,72,9,131,
  233,255,72,33,131,233,255,72,49,131,233,255,72,129,192,239,255,72,129,232,
  239,255,72,129,200,239,255,72,129,224,239,255,72,129,252,240,239,255,72,3,
  131,233,255,72,43,131,233,255,72,11,131,233,255,72,35,131,233,255,72,51,131,
  233,255,72,15,175,131,233,255,138,139,233,72,211,224,255,138,139,233,72,211,
  232,255,72,139,131,233,72,139,139,233,72,131,252,249,0,15,133,244,247,76,
  137,252,247,72,190,237,237,254,1,252,255,21,244,5,248,1,255,15,156,214,72,
  131,252,248,0,15,156,210,48,252,242,68,15,182,194,72,153,72,252,247,252,249,
  72,133,210,15,149,209,65,32,200,255,76,41,192,72,137,131,233,255,252,255,
  21,244,5,248,1,72,153,72,252,247,252,249,72,137,147,233,255,72,131,131,233,
  1,255,72,131,171,233,1,255,72,139,139,233,72,252,247,209,72,137,139,233,255,
  72,139,139,233,72,252,247,217,72,137,139,233,255,72,139,131,233,72,152,72,
  137,131,233,255,72,139,139,233,255,137,202,72,137,147,233,255,252,242,15,
  16,131,233,255,252,242,15,88,131,233,255,252,242,15,92,131,233,255,252,242,
  15,89,131,233,255,252,242,15,94,131,233,255,252,242,15,17,131,233,255,252,
  242,72,15,42,131,233,252,242,15,17,131,233,255,252,242,72,15,44,131,233,72,
  137,131,233,255,72,199,193,1,0,0,0,72,193,225,63,72,139,147,233,72,49,202,
  72,137,147,233,255,72,59,131,233,255,15,148,208,255,15,149,208,255,15,156,
  208,255,15,158,208,255,15,159,208,255,15,157,208,255,72,15,182,192,72,137,
  131,233,255,72,59,139,233,255,15,159,210,72,15,182,210,65,15,156,208,77,15,
  182,192,76,41,194,72,137,147,233,255,72,199,194,1,0,0,0,255,72,199,194,252,
  255,252,255,252,255,252,255,255,72,199,194,0,0,0,0,255,72,59,147,233,255,
  72,199,193,0,0,0,0,255,72,199,193,1,0,0,0,255,252,242,15,16,131,233,102,15,
  46,131,233,255,15,147,209,255,15,155,210,72,15,68,202,255,15,154,210,72,15,
  68,202,255,15,151,209,255,72,15,182,201,72,137,139,233,255,252,242,15,16,
  131,233,252,242,15,16,139,233,102,15,46,193,15,151,209,72,15,182,193,102,
  15,46,200,15,151,209,72,15,182,201,72,41,200,72,137,131,233,255,72,199,199,
  237,72,139,179,233,72,139,147,233,254,1,72,129,252,248,239,15,148,208,255,
  72,129,252,248,239,15,149,208,255,72,139,139,233,72,133,201,15,132,244,247,
  72,139,137,233,72,139,137,233,72,129,185,233,239,15,133,244,247,72,199,131,
  233,1,0,0,0,252,233,244,248,248,1,72,199,131,233,0,0,0,0,248,2,255,72,139,
  139,233,72,139,145,233,72,131,194,1,76,139,129,233,255,76,57,194,15,156,209,
  72,15,182,201,72,137,139,233,255,72,139,139,233,72,139,145,233,72,133,210,
  15,149,210,72,15,182,210,72,137,147,233,255,76,139,155,233,77,133,219,15,
  132,244,247,73,139,179,233,76,139,150,233,77,139,146,233,76,137,252,247,65,
  252,255,210,76,15,183,152,233,248,1,76,137,155,233,255,76,139,155,233,77,
  133,219,15,132,244,247,73,139,179,233,76,139,150,233,77,139,146,233,76,137,
  252,247,65,252,255,210,76,15,183,152,233,77,133,219,15,132,244,247,76,15,
  183,152,233,248,1,76,137,155,233,255,72,139,139,233,72,133,201,15,149,210,
  77,139,134,233,77,139,128,233,76,57,193,65,15,149,208,68,32,194,72,15,182,
  210,72,137,147,233,255,72,139,139,233,72,133,201,15,148,210,77,139,134,233,
  77,139,128,233,76,57,193,65,15,148,208,68,8,194,72,15,182,210,72,137,147,
  233,255,76,137,252,247,72,199,198,237,254,1,252,255,21,244,5,73,139,142,233,
  72,139,137,233,72,139,137,233,72,137,136,233,102,199,128,233,236,65,139,142,
  233,137,136,233,72,137,131,233,255,76,139,147,233,77,133,210,255,15,132,244,
  247,102,65,252,247,130,233,236,255,15,133,244,247,77,139,154,233,77,139,155,
  233,77,133,219,255,15,132,244,247,76,137,252,247,76,137,214,72,141,147,233,
  77,139,147,233,65,252,255,210,252,233,244,248,248,1,255,76,137,147,233,248,
  2,255,72,139,139,233,72,133,201,15,132,244,247,72,139,137,233,72,139,137,
  233,72,133,201,248,1,15,149,209,72,15,182,201,72,137,139,233,255,73,139,142,
  233,72,139,137,233,72,139,137,233,72,139,147,233,72,139,146,233,72,57,209,
  15,133,244,247,77,139,134,233,77,139,128,233,77,139,128,233,76,137,131,233,
  252,233,244,248,248,1,255,73,139,134,233,76,141,29,244,248,76,137,152,233,
  255,76,137,252,247,72,139,179,233,255,73,139,149,233,72,139,146,233,72,199,
  193,237,76,141,155,233,77,137,216,254,1,252,255,21,244,5,72,133,192,255,15,
  133,244,11,248,2,255,72,139,139,233,72,133,201,15,132,244,247,102,252,247,
  129,233,236,15,133,244,247,72,199,131,233,1,0,0,0,252,233,244,248,248,1,72,
  199,131,233,0,0,0,0,248,2,255,73,139,142,233,72,137,139,233,73,199,134,233,
  0,0,0,0,255,73,139,142,233,72,133,201,15,132,244,247,72,139,137,233,72,137,
  139,233,252,233,244,248,248,1,73,139,142,233,72,139,137,233,72,137,139,233,
  248,2,255,65,139,142,233,131,193,1,65,137,142,233,72,137,139,233,255,65,139,
  142,233,131,252,233,1,65,137,142,233,72,137,139,233,255,72,139,179,233,76,
  139,150,233,77,139,146,233,77,133,210,15,133,244,247,76,137,252,247,72,190,
  237,237,254,1,252,255,21,244,5,248,1,76,137,252,247,72,139,147,233,255,65,
  252,255,210,255,76,137,252,247,72,139,179,233,72,199,194,237,254,1,73,139,
  182,233,72,141,182,233,102,68,139,150,233,102,68,59,150,233,15,132,244,247,
  76,137,252,247,254,1,72,139,139,233,72,133,201,15,133,244,247,76,137,252,
  247,254,1,76,137,252,247,73,139,182,233,72,139,182,233,72,199,194,237,254,
  1,76,137,252,247,73,139,182,233,72,139,182,233,72,139,182,233,72,199,194,
  237,254,1,72,139,139,233,139,145,233,77,49,192,131,252,250,0,15,142,244,247,
  77,139,134,233,77,139,128,233,77,139,4,208,77,139,128,233,248,1,76,137,131,
  233,255,102,252,247,129,233,236,15,133,244,247,72,139,145,233,72,139,146,
  233,129,186,233,239,15,132,244,248,248,1,255,76,137,252,247,72,139,179,233,
  72,49,210,254,1,72,137,198,255,72,141,187,233,77,139,158,233,73,137,187,233,
  255,65,198,131,233,235,255,73,139,190,233,72,139,63,73,137,187,233,255,76,
  137,252,247,72,139,147,233,72,139,138,233,72,139,145,233,72,139,137,233,76,
  139,150,233,77,139,146,233,65,252,255,210,255,252,255,21,244,5,248,2,72,139,
  145,233,72,15,183,146,233,72,137,147,233,255,252,255,21,244,5,248,2,72,139,
  145,233,102,68,139,130,233,102,139,146,233,102,68,57,194,15,149,208,72,15,
  182,192,72,137,131,233,255,77,139,134,233,255,252,255,21,244,5,72,137,131,
  233,255,72,139,145,233,72,139,146,233,129,186,233,239,15,132,244,247,255,
  252,255,21,244,5,248,1,72,139,147,233,72,137,145,233,255,77,139,134,233,76,
  137,131,233,255,76,137,252,247,72,139,183,233,72,141,182,233,72,199,194,237,
  254,1,76,137,252,247,72,139,183,233,72,141,182,233,254,1,76,137,252,247,72,
  139,179,233,72,139,147,233,72,139,139,233,76,141,131,233,76,139,150,233,77,
  139,146,233,77,139,146,233,65,252,255,210,255,76,137,252,247,72,139,179,233,
  76,139,150,233,77,139,146,233,77,139,146,233,65,252,255,210,72,137,131,233,
  255,76,137,252,247,72,139,179,233,72,139,147,233,76,139,150,233,77,139,146,
  233,77,139,146,233,65,252,255,210,255,77,137,252,243,255,77,137,252,235,255,
  77,139,158,233,77,141,155,233,255,77,139,158,233,77,139,155,233,255,76,139,
  155,233,255,76,141,155,233,255,77,139,157,233,77,139,155,233,255,73,199,195,
  237,255,73,187,237,237,255,76,139,155,233,77,141,155,233,255,76,141,29,245,
  255,76,137,223,255,76,137,222,255,76,137,218,255,76,137,217,255,77,137,216,
  255,77,137,217,255,102,73,15,110,195,255,102,73,15,110,203,255,102,73,15,
  110,211,255,102,73,15,110,219,255,102,73,15,110,227,255,102,73,15,110,252,
  235,255,102,73,15,110,252,243,255,102,73,15,110,252,251,255,68,136,156,253,
  36,233,255,102,68,137,156,253,36,233,255,76,137,156,253,36,233,255,72,139,
  8,72,137,139,233,255,72,139,139,233,72,137,8,255,73,131,190,233,0,15,132,
  244,247,76,137,252,247,254,1,252,233,244,10,255,252,233,245,255,72,139,131,
  233,72,133,192,15,133,245,255,72,139,131,233,72,133,192,15,132,245,255,102,
  72,15,110,131,233,102,15,87,201,102,15,46,193,15,138,245,15,133,245,255,102,
  72,15,110,131,233,102,15,87,201,102,15,46,193,15,138,244,247,15,133,244,247,
  252,233,245,248,1,255,76,137,252,247,72,139,179,233,254,1,72,139,139,233,
  72,133,201,15,132,244,247,73,139,150,233,72,139,146,233,72,57,209,15,132,
  244,247,252,233,245,248,1,255,76,137,252,247,72,139,179,233,72,139,147,233,
  255,73,139,141,233,72,139,137,233,254,1,72,131,252,248,252,255,255,15,142,
  245,255,72,139,139,233,73,139,150,233,72,139,146,233,72,139,146,233,255,72,
  133,201,15,132,244,247,255,72,59,145,233,15,133,244,247,255,102,252,247,129,
  233,236,255,102,252,247,129,233,236,15,133,244,247,255,76,139,129,233,77,
  139,128,233,73,129,184,233,239,15,133,244,247,72,59,145,233,15,133,244,247,
  255,76,137,252,247,72,199,198,237,72,199,194,237,254,1,72,199,192,237,252,
  233,244,11,248,2,255,77,139,150,233,77,137,154,233,255,65,198,130,233,235,
  255,73,199,130,233,237,255,72,141,147,233,73,137,146,233,255,73,139,150,233,
  72,139,18,73,137,146,233,255,72,141,21,245,73,137,146,233,255,76,139,139,
  233,77,137,138,233,255,73,185,237,237,77,137,138,233,255,77,139,141,233,77,
  139,137,233,77,137,138,233,255,76,137,85,216,76,137,93,208,255,76,137,252,
  247,72,139,179,233,72,141,85,208,76,137,209,73,199,192,0,0,0,0,254,1,76,139,
  93,208,76,139,85,216,255,76,137,252,247,72,137,198,76,137,218,76,137,209,
  255,76,139,144,233,77,139,146,233,65,252,255,210,255,76,137,252,247,72,139,
  179,233,76,137,218,72,199,193,237,254,1,72,199,192,1,0,0,0,252,233,244,11,
  255,72,139,139,233,72,131,252,249,0,15,140,244,248,72,129,252,249,239,15,
  141,244,248,72,107,201,8,72,141,21,244,247,72,1,202,252,255,226,250,7,248,
  1,255,249,252,233,245,250,7,255,65,139,134,233,59,69,224,15,132,244,255,72,
  199,192,1,0,0,0,252,233,244,11,248,9,255,72,141,13,244,247,73,139,150,233,
  72,137,138,233,248,1,255,72,141,13,244,255,73,139,150,233,72,137,138,233,
  255,65,139,142,233,59,77,224,15,133,244,254,255,73,139,142,233,252,255,161,
  233,255,248,8,72,199,192,1,0,0,0,252,233,244,11,255,205,3,255
};

#line 75 "src/jit/emit_x64.dasc"
//|.section code, data
#define DASM_SECTION_CODE 0
#define DASM_SECTION_DATA 1
#define DASM_MAXSECTION   2
#line 76 "src/jit/emit_x64.dasc"
//|.globals MVM_JIT_LABEL_
enum {
  MVM_JIT_LABEL_exit,
  MVM_JIT_LABEL_out,
  MVM_JIT_LABEL__MAX
};
#line 77 "src/jit/emit_x64.dasc"

/* type declarations */
//|.type REGISTER, MVMRegister
#define Dt1(_V) (int)(ptrdiff_t)&(((MVMRegister *)0)_V)
#line 80 "src/jit/emit_x64.dasc"
//|.type FRAME, MVMFrame
#define Dt2(_V) (int)(ptrdiff_t)&(((MVMFrame *)0)_V)
#line 81 "src/jit/emit_x64.dasc"
//|.type ARGCTX, MVMArgProcContext
#define Dt3(_V) (int)(ptrdiff_t)&(((MVMArgProcContext *)0)_V)
#line 82 "src/jit/emit_x64.dasc"
//|.type CALLSITEPTR, MVMCallsite*
#define Dt4(_V) (int)(ptrdiff_t)&(((MVMCallsite* *)0)_V)
#line 83 "src/jit/emit_x64.dasc"
//|.type CAPTURE, MVMCallCapture
#define Dt5(_V) (int)(ptrdiff_t)&(((MVMCallCapture *)0)_V)
#line 84 "src/jit/emit_x64.dasc"
//|.type CAPTUREBODY, MVMCallCaptureBody
#define Dt6(_V) (int)(ptrdiff_t)&(((MVMCallCaptureBody *)0)_V)
#line 85 "src/jit/emit_x64.dasc"
//|.type ARGPROCCONTEXT, MVMArgProcContext
#define Dt7(_V) (int)(ptrdiff_t)&(((MVMArgProcContext *)0)_V)
#line 86 "src/jit/emit_x64.dasc"
//|.type STATICFRAME, MVMStaticFrame
#define Dt8(_V) (int)(ptrdiff_t)&(((MVMStaticFrame *)0)_V)
#line 87 "src/jit/emit_x64.dasc"
//|.type P6OPAQUE, MVMP6opaque
#define Dt9(_V) (int)(ptrdiff_t)&(((MVMP6opaque *)0)_V)
#line 88 "src/jit/emit_x64.dasc"
//|.type P6OBODY, MVMP6opaqueBody
#define DtA(_V) (int)(ptrdiff_t)&(((MVMP6opaqueBody *)0)_V)
#line 89 "src/jit/emit_x64.dasc"
//|.type MVMITER, MVMIter
#define DtB(_V) (int)(ptrdiff_t)&(((MVMIter *)0)_V)
#line 90 "src/jit/emit_x64.dasc"
//|.type MVMINSTANCE, MVMInstance
#define DtC(_V) (int)(ptrdiff_t)&(((MVMInstance *)0)_V)
#line 91 "src/jit/emit_x64.dasc"
//|.type MVMACTIVEHANDLERS, MVMActiveHandler
#define DtD(_V) (int)(ptrdiff_t)&(((MVMActiveHandler *)0)_V)
#line 92 "src/jit/emit_x64.dasc"
//|.type OBJECT, MVMObject
#define DtE(_V) (int)(ptrdiff_t)&(((MVMObject *)0)_V)
#line 93 "src/jit/emit_x64.dasc"
//|.type STOOGE, MVMObjectStooge
#define DtF(_V) (int)(ptrdiff_t)&(((MVMObjectStooge *)0)_V)
#line 94 "src/jit/emit_x64.dasc"
//|.type COLLECTABLE, MVMCollectable
#define Dt10(_V) (int)(ptrdiff_t)&(((MVMCollectable *)0)_V)
#line 95 "src/jit/emit_x64.dasc"
//|.type STABLE, MVMSTable
#define Dt11(_V) (int)(ptrdiff_t)&(((MVMSTable *)0)_V)
#line 96 "src/jit/emit_x64.dasc"
//|.type REPR, MVMREPROps
#define Dt12(_V) (int)(ptrdiff_t)&(((MVMREPROps *)0)_V)
#line 97 "src/jit/emit_x64.dasc"
//|.type STRING, MVMString*
#define Dt13(_V) (int)(ptrdiff_t)&(((MVMString* *)0)_V)
#line 98 "src/jit/emit_x64.dasc"
//|.type OBJECTPTR, MVMObject*
#define Dt14(_V) (int)(ptrdiff_t)&(((MVMObject* *)0)_V)
#line 99 "src/jit/emit_x64.dasc"
//|.type CONTAINERSPEC, MVMContainerSpec
#define Dt15(_V) (int)(ptrdiff_t)&(((MVMContainerSpec *)0)_V)
#line 100 "src/jit/emit_x64.dasc"
//|.type STORAGESPEC, MVMStorageSpec
#define Dt16(_V) (int)(ptrdiff_t)&(((MVMStorageSpec *)0)_V)
#line 101 "src/jit/emit_x64.dasc"
//|.type HLLCONFIG, MVMHLLConfig;
#define Dt17(_V) (int)(ptrdiff_t)&(((MVMHLLConfig *)0)_V)
#line 102 "src/jit/emit_x64.dasc"
//|.type SCREFBODY, MVMSerializationContextBody
#define Dt18(_V) (int)(ptrdiff_t)&(((MVMSerializationContextBody *)0)_V)
#line 103 "src/jit/emit_x64.dasc"
//|.type NFGSYNTH, MVMNFGSynthetic
#define Dt19(_V) (int)(ptrdiff_t)&(((MVMNFGSynthetic *)0)_V)
#line 104 "src/jit/emit_x64.dasc"
//|.type CODE, MVMCode
#define Dt1A(_V) (int)(ptrdiff_t)&(((MVMCode *)0)_V)
#line 105 "src/jit/emit_x64.dasc"
//|.type U8, MVMuint8
#define Dt1B(_V) (int)(ptrdiff_t)&(((MVMuint8 *)0)_V)
#line 106 "src/jit/emit_x64.dasc"
//|.type U16, MVMuint16
#define Dt1C(_V) (int)(ptrdiff_t)&(((MVMuint16 *)0)_V)
#line 107 "src/jit/emit_x64.dasc"
//|.type U32, MVMuint32
#define Dt1D(_V) (int)(ptrdiff_t)&(((MVMuint32 *)0)_V)
#line 108 "src/jit/emit_x64.dasc"
//|.type U64, MVMuint64
#define Dt1E(_V) (int)(ptrdiff_t)&(((MVMuint64 *)0)_V)
#line 109 "src/jit/emit_x64.dasc"


/* Static allocation of relevant types to registers. I pick
 * callee-save registers for efficiency. It is likely we'll be calling
 * quite a C functions, and this saves us the trouble of storing
 * them. Moreover, C compilers preferentially do not use callee-saved
 * registers, and so in most cases, these won't be touched at all. */
//|.type TC, MVMThreadContext, r14
#define Dt1F(_V) (int)(ptrdiff_t)&(((MVMThreadContext *)0)_V)
#line 117 "src/jit/emit_x64.dasc"
/* Alternative base pointer. I'll be using this often, so picking rbx
 * here rather than the extended registers will lead to smaller
 * bytecode */
//|.type WORK, MVMRegister, rbx
#define Dt20(_V) (int)(ptrdiff_t)&(((MVMRegister *)0)_V)
#line 121 "src/jit/emit_x64.dasc"
//|.type CU, MVMCompUnit, r13
#define Dt21(_V) (int)(ptrdiff_t)&(((MVMCompUnit *)0)_V)
#line 122 "src/jit/emit_x64.dasc"




const MVMint32 MVM_jit_support(void) {
#ifdef __i386__
    /* Usually, this file should only be compiled only on a amd64
       platform; but when compiling 'fat' or 'universal' binaries, we
       may compile it for other platform. In this case we use the
       runtime check to disable the JIT */
    return 0;
#else
    return 1;
#endif
}

const unsigned char * MVM_jit_actions(void) {
    return actions;
}

const unsigned int MVM_jit_num_globals(void) {
    return MVM_JIT_LABEL__MAX;
}


/* C Call argument registers */
//|.if WIN32
//|.define ARG1, rcx
//|.define ARG2, rdx
//|.define ARG3, r8
//|.define ARG4, r9
//|.else
//|.define ARG1, rdi
//|.define ARG2, rsi
//|.define ARG3, rdx
//|.define ARG4, rcx
//|.define ARG5, r8
//|.define ARG6, r9
//|.endif

/* C call argument registers for floating point */
//|.if WIN32
//|.define ARG1F, xmm0
//|.define ARG2F, xmm1
//|.define ARG3F, xmm2
//|.define ARG4F, xmm3
//|.else
//|.define ARG1F, xmm0
//|.define ARG2F, xmm1
//|.define ARG3F, xmm2
//|.define ARG4F, xmm3
//|.define ARG5F, xmm4
//|.define ARG6F, xmm5
//|.define ARG7F, xmm6
//|.define ARG8F, xmm7
//|.endif

/* Special register for the function to be invoked
 * (chosen because it isn't involved in argument passing
 *  and volatile) */
//|.define FUNCTION, r10
/* all-purpose temporary registers */
//|.define TMP1, rcx
//|.define TMP2, rdx
//|.define TMP3, r8
//|.define TMP4, r9
//|.define TMP5, r10
//|.define TMP6, r11
/* same, but 32 bits wide */
//|.define TMP1d, ecx
//|.define TMP2d, edx
//|.define TMP3d, r8d
//|.define TMP4d, r9d
//|.define TMP5d, r10d
//|.define TMP6d, r11d
/* and 16 bits wide */
//|.define TMP1w, cx
//|.define TMP2w, dx
//|.define TMP3w, r8w
//|.define TMP4w, r9w
//|.define TMP5w, r10w
//|.define TMP6w, r11w
/* and 8 bits for good measure */
//|.define TMP1b, cl
//|.define TMP2b, dl
//|.define TMP3b, r8b
//|.define TMP4b, r9b
//|.define TMP5b, r10b
//|.define TMP6b, r11b


/* return value */
//|.define RV, rax
//|.define RVd, eax
//|.define RVF, xmm0


//|.macro callp, funcptr
//|.data
//|5:
//|.dword (MVMuint32)((uintptr_t)(funcptr)), (MVMuint32)((uintptr_t)(funcptr) >> 32);
//|.code
//| call qword [<5];
//|.endmacro


//|.macro check_wb, root, ref, lbl;
//| test word COLLECTABLE:root->flags, MVM_CF_SECOND_GEN;
//| jz lbl;
//| test ref, ref;
//| jz lbl;
//| test word COLLECTABLE:ref->flags, MVM_CF_SECOND_GEN;
//| jnz lbl;
//|.endmacro;

//|.macro hit_wb, obj
//| mov ARG2, obj;
//| mov ARG1, TC;
//| callp &MVM_gc_write_barrier_hit;
//|.endmacro

//|.macro get_spesh_slot, reg, idx;
//| mov reg, TC->cur_frame;
//| mov reg, FRAME:reg->effective_spesh_slots;
//| mov reg, OBJECTPTR:reg[idx];
//|.endmacro

//|.macro get_vmnull, reg
//| mov reg, TC->instance;
//| mov reg, MVMINSTANCE:reg->VMNull;
//|.endmacro

//|.macro get_cur_op, reg
//| mov reg, TC->interp_cur_op
//| mov reg, [reg]
//|.endmacro

//|.macro get_string, reg, idx
//|| MVM_cu_ensure_string_decoded(tc, jg->sg->sf->body.cu, idx);
//| mov reg, CU->body.strings;
//| mov reg, STRING:reg[idx];
//|.endmacro

//|.macro is_type_object, reg
//| test word OBJECT:reg->header.flags, MVM_CF_TYPE_OBJECT
//|.endmacro

//|.macro gc_sync_point
//| cmp qword TC->gc_status, 0;
//| je >1;
//| mov ARG1, TC;
//| callp &MVM_gc_enter_from_interrupt;
//|1:
//|.endmacro

//|.macro throw_adhoc, msg
//| mov ARG1, TC;
//| mov64 ARG2, (uintptr_t)(msg);
//| callp &MVM_exception_throw_adhoc;
//|.endmacro

//|.define FRAME_NR, dword [rbp-0x20]

/* A function prologue is always the same in x86 / x64, because
 * we do not provide variable arguments, instead arguments are provided
 * via a frame. All JIT entry points receive a prologue. */
void MVM_jit_emit_prologue(MVMThreadContext *tc, MVMJitGraph *jg,
                           dasm_State **Dst) {
    //|.code
    dasm_put(Dst, 0);
#line 291 "src/jit/emit_x64.dasc"
    /* Setup stack */
    //| push rbp; // nb, this aligns the stack to 16 bytes again
    //| mov rbp, rsp;
    dasm_put(Dst, 2);
#line 294 "src/jit/emit_x64.dasc"
    /* allocate stack space: 0x100 bytes = 256 bytes
     *
     * layout: [ a: 0x20 | b: 0x40 | c: 0xa0 | d: 0x20 ]
     * a: space for 4 callee-save registers
     * b: small scratch space
     * c: space for stack arguments to c calls
     * d: reserve space for GPR registers to c calls (win64) or more space for
     * stack arguments (posix) */
    //| sub rsp, 0x100;
    dasm_put(Dst, 7);
#line 303 "src/jit/emit_x64.dasc"
    /* save callee-save registers */
    //| mov [rbp-0x8],  TC;
    //| mov [rbp-0x10], CU;
    //| mov [rbp-0x18], WORK;
    dasm_put(Dst, 16);
#line 307 "src/jit/emit_x64.dasc"
    /* store the current frame number for cheap comparisons */
    //| mov TMP6d, dword TC:ARG1->current_frame_nr;
    //| mov FRAME_NR, TMP6d;
    dasm_put(Dst, 31, Dt1F(->current_frame_nr));
#line 310 "src/jit/emit_x64.dasc"
    /* setup special frame variables */
    //| mov TC,   ARG1;
    //| mov CU,   ARG2;
    //| mov TMP6, TC->cur_frame;
    //| mov WORK, FRAME:TMP6->work;
    dasm_put(Dst, 40, Dt1F(->cur_frame), Dt2(->work));
#line 315 "src/jit/emit_x64.dasc"
    /* ARG3 contains our 'entry label' */
    //| jmp ARG3
    dasm_put(Dst, 57);
#line 317 "src/jit/emit_x64.dasc"
}

/* And a function epilogue is also always the same */
void MVM_jit_emit_epilogue(MVMThreadContext *tc, MVMJitGraph *jg,
                           dasm_State **Dst) {
    //| ->exit:
    //| mov RV, 0;
    //| ->out:
    dasm_put(Dst, 61);
#line 325 "src/jit/emit_x64.dasc"
    /* restore callee-save registers */
    //| mov TC, [rbp-0x8];
    //| mov CU, [rbp-0x10];
    //| mov WORK, [rbp-0x18];
    dasm_put(Dst, 73);
#line 329 "src/jit/emit_x64.dasc"
    /* Restore stack */
    //| mov rsp, rbp;
    //| pop rbp;
    //| ret;
    dasm_put(Dst, 88);
#line 333 "src/jit/emit_x64.dasc"
}

static MVMuint64 try_emit_gen2_ref(MVMThreadContext *tc, MVMJitGraph *jg,
                                   MVMObject *obj, MVMint16 reg,
                                   dasm_State **Dst) {
    if (!(obj->header.flags & MVM_CF_SECOND_GEN))
        return 0;
    //| mov64 TMP1, (uintptr_t)obj;
    //| mov WORK[reg], TMP1;
    dasm_put(Dst, 95, (unsigned int)((uintptr_t)obj), (unsigned int)(((uintptr_t)obj)>>32), Dt20([reg]));
#line 342 "src/jit/emit_x64.dasc"
    return 1;
}

static MVMint64 fits_in_32_bit(MVMint64 number) {
    /* Used to determine if a 64 bit integer can be safely used as a
     * 32 bit constant for immediate mode access */
    return (number >= INT32_MIN) && (number <= INT32_MAX);
}

/* compile per instruction, can't really do any better yet */
void MVM_jit_emit_primitive(MVMThreadContext *tc, MVMJitGraph *jg,
                            MVMJitPrimitive * prim, dasm_State **Dst) {
    MVMSpeshIns *ins = prim->ins;
    MVMuint16 op = ins->info->opcode;
    MVM_jit_log(tc, "emit opcode: <%s>\n", ins->info->name);
    /* Quite a few of these opcodes are copies. Ultimately, I want to
     * move copies to their own node (MVMJitCopy or such), and reduce
     * the number of copies (and thereby increase the efficiency), but
     * currently that isn't really feasible. */
    switch (op) {
    case MVM_OP_const_i64_16:
    case MVM_OP_const_i64_32: {
        MVMint32 reg = ins->operands[0].reg.orig;
        /* Upgrade to 64 bit */
        MVMint64 val = (op == MVM_OP_const_i64_16 ? (MVMint64)ins->operands[1].lit_i16 :
                        (MVMint64)ins->operands[1].lit_i32);
        //| mov qword WORK[reg], val;
        dasm_put(Dst, 104, Dt20([reg]), val);
#line 369 "src/jit/emit_x64.dasc"
        break;
    }
    case MVM_OP_const_i64: {
        MVMint32 reg = ins->operands[0].reg.orig;
        MVMint64 val = ins->operands[1].lit_i64;
        //| mov64 TMP1, val;
        //| mov WORK[reg], TMP1;
        dasm_put(Dst, 95, (unsigned int)(val), (unsigned int)((val)>>32), Dt20([reg]));
#line 376 "src/jit/emit_x64.dasc"
        break;
    }
    case MVM_OP_const_n64: {
        MVMint16 reg = ins->operands[0].reg.orig;
        MVMint64 valbytes = ins->operands[1].lit_i64;
        MVM_jit_log(tc, "store const %f\n", ins->operands[1].lit_n64);
        //| mov64 TMP1, valbytes;
        //| mov WORK[reg], TMP1;
        dasm_put(Dst, 95, (unsigned int)(valbytes), (unsigned int)((valbytes)>>32), Dt20([reg]));
#line 384 "src/jit/emit_x64.dasc"
        break;
    }
    case MVM_OP_inf:
    case MVM_OP_neginf:
    case MVM_OP_nan: {
        MVMint16 reg = ins->operands[0].reg.orig;
        MVMRegister tmp;
        if (op == MVM_OP_nan)
            tmp.n64 = MVM_num_nan(tc);
        else if (op == MVM_OP_inf)
            tmp.n64 = MVM_num_posinf(tc);
        else if (op == MVM_OP_neginf)
            tmp.n64 = MVM_num_neginf(tc);
        //| mov64 TMP1, tmp.i64;
        //| mov WORK[reg], TMP1;
        dasm_put(Dst, 95, (unsigned int)(tmp.i64), (unsigned int)((tmp.i64)>>32), Dt20([reg]));
#line 399 "src/jit/emit_x64.dasc"
        break;
    }
    case MVM_OP_const_s: {
         MVMint16 reg = ins->operands[0].reg.orig;
         MVMuint32 idx = ins->operands[1].lit_str_idx;
         MVMStaticFrame *sf = jg->sg->sf;
         MVMString * s = MVM_cu_string(tc, sf->body.cu, idx);
         if (!try_emit_gen2_ref(tc, jg, (MVMObject*)s, reg, Dst)) {
             //| get_string TMP1, idx;
              MVM_cu_ensure_string_decoded(tc, jg->sg->sf->body.cu, idx);
#line 408 "src/jit/emit_x64.dasc"
             //| mov WORK[reg], TMP1;
             dasm_put(Dst, 110, Dt21(->body.strings), Dt13([idx]), Dt20([reg]));
#line 409 "src/jit/emit_x64.dasc"
         }
         break;
    }
    case MVM_OP_null: {
        MVMint16 reg = ins->operands[0].reg.orig;
        //| get_vmnull TMP1;
        //| mov WORK[reg], TMP1;
        dasm_put(Dst, 123, Dt1F(->instance), DtC(->VMNull), Dt20([reg]));
#line 416 "src/jit/emit_x64.dasc"
        break;
    }
    case MVM_OP_getwhat:
    case MVM_OP_getwho: {
        MVMint16 dst = ins->operands[0].reg.orig;
        MVMint16 obj = ins->operands[1].reg.orig;
        //| mov TMP1, WORK[obj];
        //| mov TMP1, OBJECT:TMP1->st;
        dasm_put(Dst, 136, Dt20([obj]), DtE(->st));
#line 424 "src/jit/emit_x64.dasc"
        if (op == MVM_OP_getwho) {
            //| mov TMP1, STABLE:TMP1->WHO;
            //| get_vmnull TMP2;
            //| test TMP1, TMP1;
            //| cmovz TMP1, TMP2;
            dasm_put(Dst, 145, Dt11(->WHO), Dt1F(->instance), DtC(->VMNull));
#line 429 "src/jit/emit_x64.dasc"
        } else {
            //| mov TMP1, STABLE:TMP1->WHAT;
            dasm_put(Dst, 140, Dt11(->WHAT));
#line 431 "src/jit/emit_x64.dasc"
        }
        //| mov WORK[dst], TMP1;
        dasm_put(Dst, 99, Dt20([dst]));
#line 433 "src/jit/emit_x64.dasc"
        break;
    }
    case MVM_OP_getlex:
    case MVM_OP_sp_getlex_o:
    case MVM_OP_sp_getlex_ins: {
        MVMuint16 *lexical_types;
        MVMStaticFrame * sf = jg->sg->sf;
        MVMint16 dst = ins->operands[0].reg.orig;
        MVMint16 idx = ins->operands[1].lex.idx;
        MVMint16 out = ins->operands[1].lex.outers;
        MVMint16 i;
        //| mov TMP6, TC->cur_frame;
        dasm_put(Dst, 165, Dt1F(->cur_frame));
#line 445 "src/jit/emit_x64.dasc"
        for (i = 0; i < out; i++) {
            /* I'm going to skip compiling the check whether the outer
             * node really exists, because if the code has run N times
             * correctly, then the outer frame must have existed then,
             * and since this chain is static, it should still exist
             * now.  If it doesn't exist, that means we crash.
             *
             * NB: inlining /might/ make this all wrong! But, if that
             * happens, the interpreter will panic even without JIT */
            //| mov TMP6, FRAME:TMP6->outer;
            dasm_put(Dst, 170, Dt2(->outer));
#line 455 "src/jit/emit_x64.dasc"
            sf = sf->body.outer;
        }
        /* get array of lexicals */
        //| mov TMP5, FRAME:TMP6->env;
        dasm_put(Dst, 175, Dt2(->env));
#line 459 "src/jit/emit_x64.dasc"
        /* read value */
        //| mov TMP5, REGISTER:TMP5[idx];
        dasm_put(Dst, 180, Dt1([idx]));
#line 461 "src/jit/emit_x64.dasc"
        /* it seems that if at runtime, if the outer frame has been inlined,
         * this /could/ be wrong. But if that is so, the interpreted instruction
         * would also be wrong, because it'd refer to the wrong lexical. */
        lexical_types = (!out && jg->sg->lexical_types ?
                         jg->sg->lexical_types :
                         sf->body.lexical_types);
        MVM_jit_log(tc, "Lexical type of register: %d\n", lexical_types[idx]);
        if (lexical_types[idx] == MVM_reg_obj) {
            MVM_jit_log(tc, "Emit lex vifivy check\n");
            /* if it is zero, check if we need to auto-vivify */
            //| test TMP5, TMP5;
            //| jnz >1;
            dasm_put(Dst, 185);
#line 473 "src/jit/emit_x64.dasc"
            /* setup args */
            //| mov ARG1, TC;
            //| mov ARG2, TMP6;
            //| mov ARG3, idx;
            //| callp &MVM_frame_vivify_lexical;
            dasm_put(Dst, 193, idx);
            dasm_put(Dst, 206, (MVMuint32)((uintptr_t)(&MVM_frame_vivify_lexical)), (MVMuint32)((uintptr_t)(&MVM_frame_vivify_lexical) >> 32));
            dasm_put(Dst, 212);
#line 478 "src/jit/emit_x64.dasc"
            /* use return value for the result */
            //| mov TMP5, RV;
            //|1:
            dasm_put(Dst, 218);
#line 481 "src/jit/emit_x64.dasc"
        }
        /* store the value */
        //| mov WORK[dst], TMP5;
        dasm_put(Dst, 224, Dt20([dst]));
#line 484 "src/jit/emit_x64.dasc"
        break;
    }
    case MVM_OP_sp_getlexvia_o:
    case MVM_OP_sp_getlexvia_ins: {
        MVMint16 dst = ins->operands[0].reg.orig;
        MVMint16 idx = ins->operands[1].lit_ui16;
        MVMint16 out = ins->operands[2].lit_ui16;
        MVMint16 via = ins->operands[3].reg.orig;
        MVMint16 i;
        /* Resolve the frame. */
        //| mov TMP6, WORK[via];
        //| mov TMP6, CODE:TMP6->body.outer;
        dasm_put(Dst, 229, Dt20([via]), Dt1A(->body.outer));
#line 496 "src/jit/emit_x64.dasc"
        for (i = 1; i < out; i++) /* From 1 as we are already at outer */
            //| mov TMP6, FRAME:TMP6->outer;
            dasm_put(Dst, 170, Dt2(->outer));
#line 498 "src/jit/emit_x64.dasc"
        /* get array of lexicals */
        //| mov TMP5, FRAME:TMP6->env;
        dasm_put(Dst, 175, Dt2(->env));
#line 500 "src/jit/emit_x64.dasc"
        /* read value */
        //| mov TMP5, REGISTER:TMP5[idx];
        dasm_put(Dst, 180, Dt1([idx]));
#line 502 "src/jit/emit_x64.dasc"
        if (op == MVM_OP_sp_getlexvia_o) {
            MVM_jit_log(tc, "Emit lex vifivy check for via code-ref lookup\n");
            /* if it is zero, check if we need to auto-vivify */
            //| test TMP5, TMP5;
            //| jnz >1;
            dasm_put(Dst, 185);
#line 507 "src/jit/emit_x64.dasc"
            /* setup args */
            //| mov ARG1, TC;
            //| mov ARG2, TMP6;
            //| mov ARG3, idx;
            //| callp &MVM_frame_vivify_lexical;
            dasm_put(Dst, 193, idx);
            dasm_put(Dst, 206, (MVMuint32)((uintptr_t)(&MVM_frame_vivify_lexical)), (MVMuint32)((uintptr_t)(&MVM_frame_vivify_lexical) >> 32));
            dasm_put(Dst, 212);
#line 512 "src/jit/emit_x64.dasc"
            /* use return value for the result */
            //| mov TMP5, RV;
            //|1:
            dasm_put(Dst, 218);
#line 515 "src/jit/emit_x64.dasc"
        }
        /* store the value */
        //| mov WORK[dst], TMP5;
        dasm_put(Dst, 224, Dt20([dst]));
#line 518 "src/jit/emit_x64.dasc"
        break;
    }
    case MVM_OP_getlex_no:
    case MVM_OP_sp_getlex_no: {
        MVMint16  dst = ins->operands[0].reg.orig;
        MVMuint32 idx = ins->operands[1].lit_str_idx;
        //| mov ARG1, TC;
        //| get_string ARG2, idx;
        dasm_put(Dst, 238);
         MVM_cu_ensure_string_decoded(tc, jg->sg->sf->body.cu, idx);
#line 526 "src/jit/emit_x64.dasc"
        //| mov ARG3, MVM_reg_obj;
        //| callp &MVM_frame_find_lexical_by_name;
        dasm_put(Dst, 243, Dt21(->body.strings), Dt13([idx]), MVM_reg_obj);
        dasm_put(Dst, 206, (MVMuint32)((uintptr_t)(&MVM_frame_find_lexical_by_name)), (MVMuint32)((uintptr_t)(&MVM_frame_find_lexical_by_name) >> 32));
#line 528 "src/jit/emit_x64.dasc"
        //| test RV, RV;
        //| jz >1;
        //| mov RV, [RV];
        //|1:
        //| mov WORK[dst], RV;
        dasm_put(Dst, 257, Dt20([dst]));
#line 533 "src/jit/emit_x64.dasc"
        break;
    }
    case MVM_OP_bindlex: {
        MVMuint16 *lexical_types;
        MVMStaticFrame *sf = jg->sg->sf;
        MVMint16 idx = ins->operands[0].lex.idx;
        MVMint16 out = ins->operands[0].lex.outers;
        MVMint16 src = ins->operands[1].reg.orig;
        MVMint16 i;
        //| mov TMP1, TC->cur_frame;
        dasm_put(Dst, 279, Dt1F(->cur_frame));
#line 543 "src/jit/emit_x64.dasc"
        for (i = 0; i < out; i++) {
            //| mov TMP1, FRAME:TMP1->outer;
            dasm_put(Dst, 140, Dt2(->outer));
#line 545 "src/jit/emit_x64.dasc"
            sf = sf->body.outer;
        }
        lexical_types = (!out && jg->sg->lexical_types ?
                         jg->sg->lexical_types :
                         sf->body.lexical_types);
        //| mov TMP2, FRAME:TMP1->env;
        //| mov TMP3, WORK[src];
        //| mov REGISTER:TMP2[idx], TMP3;
        dasm_put(Dst, 284, Dt2(->env), Dt20([src]), Dt1([idx]));
#line 553 "src/jit/emit_x64.dasc"
        if (lexical_types[idx] == MVM_reg_obj ||
            lexical_types[idx] == MVM_reg_str) {
            //| check_wb TMP1, TMP3, >2;
            //| hit_wb TMP1;
            dasm_put(Dst, 297, Dt10(->flags), MVM_CF_SECOND_GEN, Dt10(->flags), MVM_CF_SECOND_GEN);
            dasm_put(Dst, 206, (MVMuint32)((uintptr_t)(&MVM_gc_write_barrier_hit)), (MVMuint32)((uintptr_t)(&MVM_gc_write_barrier_hit) >> 32));
#line 557 "src/jit/emit_x64.dasc"
            //|2:
            dasm_put(Dst, 334);
#line 558 "src/jit/emit_x64.dasc"
        }
        break;
    }
    case MVM_OP_sp_getarg_o:
    case MVM_OP_sp_getarg_n:
    case MVM_OP_sp_getarg_s:
    case MVM_OP_sp_getarg_i: {
        MVMint32 reg = ins->operands[0].reg.orig;
        MVMuint16 idx = ins->operands[1].callsite_idx;
        //| mov TMP1, TC->cur_frame;
        //| mov TMP1, FRAME:TMP1->params.args;
        //| mov TMP1, REGISTER:TMP1[idx];
        //| mov WORK[reg], TMP1;
        dasm_put(Dst, 342, Dt1F(->cur_frame), Dt2(->params.args), Dt1([idx]), Dt20([reg]));
#line 571 "src/jit/emit_x64.dasc"
        break;
    }
    case MVM_OP_sp_p6oget_i:
    case MVM_OP_sp_p6oget_n:
    case MVM_OP_sp_p6oget_s:
    case MVM_OP_sp_p6oget_o:
    case MVM_OP_sp_p6ogetvc_o:
    case MVM_OP_sp_p6ogetvt_o: {
        MVMint16 dst    = ins->operands[0].reg.orig;
        MVMint16 obj    = ins->operands[1].reg.orig;
        MVMint16 offset = ins->operands[2].lit_i16;
        MVMint16 body   = offsetof(MVMP6opaque, body);
        /* load address and object */
        //| mov TMP1, WORK[obj];
        //| lea TMP2, [TMP1 + (offset + body)];
        //| mov TMP4, P6OPAQUE:TMP1->body.replaced;
        //| lea TMP5, [TMP4 + offset];
        //| test TMP4, TMP4;
        //| cmovnz TMP2, TMP5;
        dasm_put(Dst, 359, Dt20([obj]), (offset + body), Dt9(->body.replaced), offset);
#line 590 "src/jit/emit_x64.dasc"
        /* TMP2 now contains address of item */
        if (op == MVM_OP_sp_p6oget_o) {
            //| mov TMP3, [TMP2];
            //| test TMP3, TMP3;
            dasm_put(Dst, 383);
#line 594 "src/jit/emit_x64.dasc"
            /* Check if object doesn't point to NULL */
            //| jnz >3;
            dasm_put(Dst, 390);
#line 596 "src/jit/emit_x64.dasc"
            /* Otherwise load VMNull */
            //| get_vmnull TMP3;
            //|3:
            dasm_put(Dst, 395, Dt1F(->instance), DtC(->VMNull));
#line 599 "src/jit/emit_x64.dasc"
        } else if (op == MVM_OP_sp_p6ogetvt_o) {
            /* vivify as type object */
            MVMint16 spesh_idx = ins->operands[3].lit_i16;
            //| mov TMP3, [TMP2];
            dasm_put(Dst, 406);
#line 603 "src/jit/emit_x64.dasc"
            /* check for null */
            //| test TMP3, TMP3;
            //| jnz >4;
            dasm_put(Dst, 410);
#line 606 "src/jit/emit_x64.dasc"
            /* if null, vivify as type object from spesh slot */
            //| get_spesh_slot TMP3, spesh_idx;
            dasm_put(Dst, 418, Dt1F(->cur_frame), Dt2(->effective_spesh_slots), Dt14([spesh_idx]));
#line 608 "src/jit/emit_x64.dasc"
            /* need to hit write barrier? */
            //| check_wb TMP1, TMP3, >3;
            //| mov qword [rbp-0x28], TMP2; // address
            //| mov qword [rbp-0x30], TMP3; // value
            //| hit_wb WORK[obj]; // write barrier for header
            dasm_put(Dst, 431, Dt10(->flags), MVM_CF_SECOND_GEN, Dt10(->flags), MVM_CF_SECOND_GEN, Dt20([obj]));
            dasm_put(Dst, 206, (MVMuint32)((uintptr_t)(&MVM_gc_write_barrier_hit)), (MVMuint32)((uintptr_t)(&MVM_gc_write_barrier_hit) >> 32));
#line 613 "src/jit/emit_x64.dasc"
            //| mov TMP3, qword [rbp-0x30];
            //| mov TMP2, qword [rbp-0x28];
            //|3:
            dasm_put(Dst, 477);
#line 616 "src/jit/emit_x64.dasc"
            /* store vivified type value in memory location */
            //| mov qword [TMP2], TMP3;
            //|4:
            dasm_put(Dst, 493);
#line 619 "src/jit/emit_x64.dasc"
        } else if (op == MVM_OP_sp_p6ogetvc_o) {
            MVMint16 spesh_idx = ins->operands[3].lit_i16;
            //| mov TMP3, [TMP2];
            //| test TMP3, TMP3;
            //| jnz >4;
            dasm_put(Dst, 499);
#line 624 "src/jit/emit_x64.dasc"
            /* vivify as clone */
            //| mov ARG1, TC;
            //| get_spesh_slot ARG2, spesh_idx;
            //| callp &MVM_repr_clone;
            dasm_put(Dst, 510, Dt1F(->cur_frame), Dt2(->effective_spesh_slots), Dt14([spesh_idx]));
            dasm_put(Dst, 206, (MVMuint32)((uintptr_t)(&MVM_repr_clone)), (MVMuint32)((uintptr_t)(&MVM_repr_clone) >> 32));
#line 628 "src/jit/emit_x64.dasc"
            //| mov TMP3, RV;
            dasm_put(Dst, 528);
#line 629 "src/jit/emit_x64.dasc"
            /* reload object and address */
            //| mov TMP1, WORK[obj];
            //| lea TMP2, [TMP1 + (offset + body)];
            //| mov TMP4, P6OPAQUE:TMP1->body.replaced;
            //| lea TMP5, [TMP4 + offset];
            //| test TMP4, TMP4;
            //| cmovnz TMP2, TMP5;
            dasm_put(Dst, 359, Dt20([obj]), (offset + body), Dt9(->body.replaced), offset);
#line 636 "src/jit/emit_x64.dasc"
            /* assign with write barrier */
            //| check_wb TMP1, TMP3, >3;
            //| mov qword [rbp-0x28], TMP2; // address
            //| mov qword [rbp-0x30], TMP3; // value
            //| hit_wb WORK[obj]; // write barrier for header
            dasm_put(Dst, 431, Dt10(->flags), MVM_CF_SECOND_GEN, Dt10(->flags), MVM_CF_SECOND_GEN, Dt20([obj]));
            dasm_put(Dst, 206, (MVMuint32)((uintptr_t)(&MVM_gc_write_barrier_hit)), (MVMuint32)((uintptr_t)(&MVM_gc_write_barrier_hit) >> 32));
#line 641 "src/jit/emit_x64.dasc"
            //| mov TMP3, qword [rbp-0x30];
            //| mov TMP2, qword [rbp-0x28];
            //|3:
            //| mov qword [TMP2], TMP3;
            dasm_put(Dst, 537);
#line 645 "src/jit/emit_x64.dasc"
            /* done */
            //|4:
            dasm_put(Dst, 496);
#line 647 "src/jit/emit_x64.dasc"
        } else {
            /* the regular case */
            //| mov TMP3, [TMP2];
            dasm_put(Dst, 406);
#line 650 "src/jit/emit_x64.dasc"
        }
        /* store in local register */
        //| mov WORK[dst], TMP3;
        dasm_put(Dst, 556, Dt20([dst]));
#line 653 "src/jit/emit_x64.dasc"
        break;
    }
    case MVM_OP_sp_bind_i64:
    case MVM_OP_sp_bind_n:
    case MVM_OP_sp_bind_s:
    case MVM_OP_sp_bind_o: {
        MVMint16 obj    = ins->operands[0].reg.orig;
        MVMint16 offset = ins->operands[1].lit_i16;
        MVMint16 val    = ins->operands[2].reg.orig;
        //| mov TMP1, WORK[obj];            // object
        //| mov TMP2, WORK[val];            // value
        dasm_put(Dst, 561, Dt20([obj]), Dt20([val]));
#line 664 "src/jit/emit_x64.dasc"
        if (op == MVM_OP_sp_bind_o || op == MVM_OP_sp_bind_s) {
            /* check if we should hit write barrier */
            //| check_wb TMP1, TMP2, >2;
            dasm_put(Dst, 570, Dt10(->flags), MVM_CF_SECOND_GEN, Dt10(->flags), MVM_CF_SECOND_GEN);
#line 667 "src/jit/emit_x64.dasc"
            /* note: it is uneccesary to store pointers, because they
               can just be loaded from memory */
            //| hit_wb WORK[obj];
            dasm_put(Dst, 467, Dt20([obj]));
            dasm_put(Dst, 206, (MVMuint32)((uintptr_t)(&MVM_gc_write_barrier_hit)), (MVMuint32)((uintptr_t)(&MVM_gc_write_barrier_hit) >> 32));
#line 670 "src/jit/emit_x64.dasc"
            //| mov TMP1, aword WORK[obj]; // reload object
            //| mov TMP2, aword WORK[val]; // reload value
            //|2: // done
            dasm_put(Dst, 598, Dt20([obj]), Dt20([val]));
#line 673 "src/jit/emit_x64.dasc"
        }
        //| mov qword [TMP1+offset], TMP2; // store value into body
        dasm_put(Dst, 614, offset);
#line 675 "src/jit/emit_x64.dasc"
        break;
    }
    case MVM_OP_sp_get_i64:
    case MVM_OP_sp_get_n:
    case MVM_OP_sp_get_s:
    case MVM_OP_sp_get_o: {
        MVMint16 dst    = ins->operands[0].reg.orig;
        MVMint16 obj    = ins->operands[1].reg.orig;
        MVMint16 offset = ins->operands[2].lit_i16;
        //| mov TMP1, WORK[obj];            // object
        //| mov TMP2, qword [TMP1+offset];   // get value from body
        //| mov WORK[dst], TMP2;
        dasm_put(Dst, 619, Dt20([obj]), offset, Dt20([dst]));
#line 687 "src/jit/emit_x64.dasc"
        break;
    }
    case MVM_OP_sp_deref_bind_i64:
    case MVM_OP_sp_deref_bind_n: {
        MVMint16 obj    = ins->operands[0].reg.orig;
        MVMint16 val    = ins->operands[1].reg.orig;
        MVMint16 offset = ins->operands[2].lit_i16;
        //| mov TMP1, WORK[obj];            // object
        //| mov TMP2, WORK[val];            // value
        //| mov TMP1, qword [TMP1+offset];  // find address of target
        //| mov qword [TMP1], TMP2;
        dasm_put(Dst, 632, Dt20([obj]), Dt20([val]), offset);
#line 698 "src/jit/emit_x64.dasc"
        break;
    }
    case MVM_OP_sp_deref_get_i64:
    case MVM_OP_sp_deref_get_n: {
        MVMint16 dst    = ins->operands[0].reg.orig;
        MVMint16 obj    = ins->operands[1].reg.orig;
        MVMint16 offset = ins->operands[2].lit_i16;
        //| mov TMP1, WORK[obj];            // object
        //| mov TMP3, qword [TMP1+offset];  // get value pointer from body
        //| mov TMP2, qword [TMP3];         // deref the pointer
        //| mov WORK[dst], TMP2;
        dasm_put(Dst, 648, Dt20([obj]), offset, Dt20([dst]));
#line 709 "src/jit/emit_x64.dasc"
        break;
    }
    case MVM_OP_sp_p6obind_i:
    case MVM_OP_sp_p6obind_n:
    case MVM_OP_sp_p6obind_s:
    case MVM_OP_sp_p6obind_o: {
        MVMint16 obj    = ins->operands[0].reg.orig;
        MVMint16 offset = ins->operands[1].lit_i16;
        MVMint16 val    = ins->operands[2].reg.orig;
        //| mov TMP1, WORK[obj];            // object
        //| mov TMP2, WORK[val];            // value
        //| lea TMP3, P6OPAQUE:TMP1->body;  // body
        //| cmp qword P6OBODY:TMP3->replaced, 0;
        //| je >1;
        //| mov TMP3, P6OBODY:TMP3->replaced; // replaced object body
        //|1:
        dasm_put(Dst, 664, Dt20([obj]), Dt20([val]), Dt9(->body), DtA(->replaced), DtA(->replaced));
#line 725 "src/jit/emit_x64.dasc"
        if (op == MVM_OP_sp_p6obind_o || op == MVM_OP_sp_p6obind_s) {
            /* check if we should hit write barrier */
            //| check_wb TMP1, TMP2, >2;
            //| mov qword [rbp-0x28], TMP2; // store value
            //| mov qword [rbp-0x30], TMP3; // store body pointer
            //| hit_wb WORK[obj];
            dasm_put(Dst, 692, Dt10(->flags), MVM_CF_SECOND_GEN, Dt10(->flags), MVM_CF_SECOND_GEN, Dt20([obj]));
            dasm_put(Dst, 206, (MVMuint32)((uintptr_t)(&MVM_gc_write_barrier_hit)), (MVMuint32)((uintptr_t)(&MVM_gc_write_barrier_hit) >> 32));
#line 731 "src/jit/emit_x64.dasc"
            //| mov TMP3, qword [rbp-0x30]; // restore body pointer
            //| mov TMP2, qword [rbp-0x28]; // restore value
            //|2: // done
            dasm_put(Dst, 737);
#line 734 "src/jit/emit_x64.dasc"
        }
        //| mov [TMP3+offset], TMP2; // store value into body
        dasm_put(Dst, 753, offset);
#line 736 "src/jit/emit_x64.dasc"
        break;
    }
    case MVM_OP_getwhere:
    case MVM_OP_set: {
         MVMint32 reg1 = ins->operands[0].reg.orig;
         MVMint32 reg2 = ins->operands[1].reg.orig;
         //| mov TMP1, WORK[reg2];
         //| mov WORK[reg1], TMP1;
         dasm_put(Dst, 758, Dt20([reg2]), Dt20([reg1]));
#line 744 "src/jit/emit_x64.dasc"
         break;
    }
    case MVM_OP_sp_getspeshslot: {
        MVMint16 dst = ins->operands[0].reg.orig;
        MVMint16 spesh_idx = ins->operands[1].lit_i16;
        //| get_spesh_slot TMP1, spesh_idx;
        //| mov WORK[dst], TMP1;
        dasm_put(Dst, 342, Dt1F(->cur_frame), Dt2(->effective_spesh_slots), Dt14([spesh_idx]), Dt20([dst]));
#line 751 "src/jit/emit_x64.dasc"
        break;
    }
    case MVM_OP_setdispatcher: {
        MVMint16 src = ins->operands[0].reg.orig;
        //| mov TMP1, aword WORK[src];
        //| mov aword TC->cur_dispatcher, TMP1;
        dasm_put(Dst, 767, Dt20([src]), Dt1F(->cur_dispatcher));
#line 757 "src/jit/emit_x64.dasc"
        break;
    }
    case MVM_OP_takedispatcher: {
        MVMint16 dst = ins->operands[0].reg.orig;
        //| mov TMP1, aword TC->cur_dispatcher;
        //| cmp TMP1, 0;
        //| je >2;
        //| mov TMP2, aword TC->cur_dispatcher_for;
        //| cmp TMP2, 0;
        //| je >1;
        //| mov TMP3, TC->cur_frame;
        //| mov TMP3, FRAME:TMP3->code_ref;
        //| cmp TMP2, TMP3;
        //| jne >2;
        //|1:
        //| mov aword WORK[dst], TMP1;
        //| mov aword TC->cur_dispatcher, NULL;
        //| jmp >3;
        //|2:
        //| get_vmnull TMP1;
        //| mov aword WORK[dst], TMP1;
        //|3:
        dasm_put(Dst, 776, Dt1F(->cur_dispatcher), Dt1F(->cur_dispatcher_for), Dt1F(->cur_frame), Dt2(->code_ref), Dt20([dst]), Dt1F(->cur_dispatcher), NULL, Dt1F(->instance), DtC(->VMNull), Dt20([dst]));
#line 779 "src/jit/emit_x64.dasc"
        break;
    }
    case MVM_OP_curcode: {
        MVMint16 dst = ins->operands[0].reg.orig;
        //| mov TMP1, TC->cur_frame;
        //| mov TMP1, aword FRAME:TMP1->code_ref;
        //| mov aword WORK[dst], TMP1;
        dasm_put(Dst, 123, Dt1F(->cur_frame), Dt2(->code_ref), Dt20([dst]));
#line 786 "src/jit/emit_x64.dasc"
        break;
    }
    case MVM_OP_getcode: {
        MVMint16 dst = ins->operands[0].reg.orig;
        MVMuint16 idx = ins->operands[1].coderef_idx;
        //| mov TMP1, aword CU->body.coderefs;
        //| mov TMP1, aword OBJECTPTR:TMP1[idx];
        //| mov aword WORK[dst], TMP1;
        dasm_put(Dst, 110, Dt21(->body.coderefs), Dt14([idx]), Dt20([dst]));
#line 794 "src/jit/emit_x64.dasc"
        break;
    }
    case MVM_OP_callercode: {
        MVMint16 dst = ins->operands[0].reg.orig;
        //| mov TMP1, TC->cur_frame;
        //| mov TMP1, aword FRAME:TMP1->caller;
        //| test TMP1, TMP1;
        //| jz >1;
        //| mov TMP1, aword FRAME:TMP1->code_ref;
        //|1:
        //| mov aword WORK[dst], TMP1;
        dasm_put(Dst, 849, Dt1F(->cur_frame), Dt2(->caller), Dt2(->code_ref), Dt20([dst]));
#line 805 "src/jit/emit_x64.dasc"
        break;
    }
    case MVM_OP_hllboxtype_n:
    case MVM_OP_hllboxtype_s:
    case MVM_OP_hllboxtype_i: {
        MVMint16 dst = ins->operands[0].reg.orig;
        //| mov TMP1, CU->body.hll_config;
        dasm_put(Dst, 875, Dt21(->body.hll_config));
#line 812 "src/jit/emit_x64.dasc"
        if (op == MVM_OP_hllboxtype_n) {
            //| mov TMP1, aword HLLCONFIG:TMP1->num_box_type;
            dasm_put(Dst, 140, Dt17(->num_box_type));
#line 814 "src/jit/emit_x64.dasc"
        } else if (op == MVM_OP_hllboxtype_s) {
            //| mov TMP1, aword HLLCONFIG:TMP1->str_box_type;
            dasm_put(Dst, 140, Dt17(->str_box_type));
#line 816 "src/jit/emit_x64.dasc"
        } else {
            //| mov TMP1, aword HLLCONFIG:TMP1->int_box_type;
            dasm_put(Dst, 140, Dt17(->int_box_type));
#line 818 "src/jit/emit_x64.dasc"
        }
        //| mov aword WORK[dst], TMP1;
        dasm_put(Dst, 99, Dt20([dst]));
#line 820 "src/jit/emit_x64.dasc"
        break;
    }
    case MVM_OP_null_s: {
        MVMint16 dst = ins->operands[0].reg.orig;
        //| mov qword WORK[dst], 0;
        dasm_put(Dst, 880, Dt20([dst]));
#line 825 "src/jit/emit_x64.dasc"
        break;
     }
    case MVM_OP_isnull_s: {
        MVMint16 dst = ins->operands[0].reg.orig;
        MVMint16 src = ins->operands[1].reg.orig;
        //| mov TMP1, WORK[src];
        //| test TMP1, TMP1;
        //| setz TMP2b;
        //| movzx TMP2, TMP2b;
        //| mov qword WORK[dst], TMP2;
        dasm_put(Dst, 889, Dt20([src]), Dt20([dst]));
#line 835 "src/jit/emit_x64.dasc"
        break;
    }

    case MVM_OP_add_i:
    case MVM_OP_sub_i:
    case MVM_OP_bor_i:
    case MVM_OP_band_i:
    case MVM_OP_bxor_i: {
        MVMint32 reg_a = ins->operands[0].reg.orig;
        MVMint32 reg_b = ins->operands[1].reg.orig;
        MVMint32 reg_c = ins->operands[2].reg.orig;

        MVMSpeshFacts *operand_facts = MVM_spesh_get_facts(tc, jg->sg, ins->operands[2]);

        if (reg_a == reg_b) {
            if (operand_facts->flags & MVM_SPESH_FACT_KNOWN_VALUE &&
                fits_in_32_bit(operand_facts->value.i)) {
                MVMint64 value = operand_facts->value.i;
                MVM_jit_log(tc, "accumulator for %s stayed in memory and "
                            " constant value %"PRId64" used\n", ins->info->name, value);
                switch(ins->info->opcode) {
                case MVM_OP_add_i:
                    //| add qword WORK[reg_a], qword value;
                    dasm_put(Dst, 908, Dt20([reg_a]), value);
#line 858 "src/jit/emit_x64.dasc"
                    break;
                case MVM_OP_sub_i:
                    //| sub qword WORK[reg_a], qword value;
                    dasm_put(Dst, 914, Dt20([reg_a]), value);
#line 861 "src/jit/emit_x64.dasc"
                    break;
                case MVM_OP_bor_i:
                    //| or qword WORK[reg_a], qword value;
                    dasm_put(Dst, 920, Dt20([reg_a]), value);
#line 864 "src/jit/emit_x64.dasc"
                    break;
                case MVM_OP_band_i:
                    //| and qword WORK[reg_a], qword value;
                    dasm_put(Dst, 926, Dt20([reg_a]), value);
#line 867 "src/jit/emit_x64.dasc"
                    break;
                case MVM_OP_bxor_i:
                    //| xor qword WORK[reg_a], qword value;
                    dasm_put(Dst, 932, Dt20([reg_a]), value);
#line 870 "src/jit/emit_x64.dasc"
                    break;
                }
            } else {
                MVM_jit_log(tc, "accumulator for %s stayed in memory\n", ins->info->name);
                //| mov rax, WORK[reg_c];
                dasm_put(Dst, 938, Dt20([reg_c]));
#line 875 "src/jit/emit_x64.dasc"
                switch(ins->info->opcode) {
                case MVM_OP_add_i:
                    //| add WORK[reg_a], rax;
                    dasm_put(Dst, 943, Dt20([reg_a]));
#line 878 "src/jit/emit_x64.dasc"
                    break;
                case MVM_OP_sub_i:
                    //| sub WORK[reg_a], rax;
                    dasm_put(Dst, 948, Dt20([reg_a]));
#line 881 "src/jit/emit_x64.dasc"
                    break;
                case MVM_OP_bor_i:
                    //| or WORK[reg_a], rax;
                    dasm_put(Dst, 953, Dt20([reg_a]));
#line 884 "src/jit/emit_x64.dasc"
                    break;
                case MVM_OP_band_i:
                    //| and WORK[reg_a], rax;
                    dasm_put(Dst, 958, Dt20([reg_a]));
#line 887 "src/jit/emit_x64.dasc"
                    break;
                case MVM_OP_bxor_i:
                    //| xor WORK[reg_a], rax;
                    dasm_put(Dst, 963, Dt20([reg_a]));
#line 890 "src/jit/emit_x64.dasc"
                    break;
                }
            }
        } else {
            if (operand_facts->flags & MVM_SPESH_FACT_KNOWN_VALUE &&
                fits_in_32_bit(operand_facts->value.i)) {
                MVMint64 value = operand_facts->value.i;
                MVM_jit_log(tc, "constant value %"PRId64" used for %s\n",
                            value, ins->info->name);
                //| mov rax, WORK[reg_b];
                dasm_put(Dst, 938, Dt20([reg_b]));
#line 900 "src/jit/emit_x64.dasc"
                switch(ins->info->opcode) {
                case MVM_OP_add_i:
                    //| add rax, qword value;
                    dasm_put(Dst, 968, value);
#line 903 "src/jit/emit_x64.dasc"
                    break;
                case MVM_OP_sub_i:
                    //| sub rax, qword value;
                    dasm_put(Dst, 973, value);
#line 906 "src/jit/emit_x64.dasc"
                    break;
                case MVM_OP_bor_i:
                    //| or rax, qword value;
                    dasm_put(Dst, 978, value);
#line 909 "src/jit/emit_x64.dasc"
                    break;
                case MVM_OP_band_i:
                    //| and rax, qword value;
                    dasm_put(Dst, 983, value);
#line 912 "src/jit/emit_x64.dasc"
                    break;
                case MVM_OP_bxor_i:
                    //| xor rax, qword value;
                    dasm_put(Dst, 988, value);
#line 915 "src/jit/emit_x64.dasc"
                    break;
                }
                //| mov WORK[reg_a], rax;
                dasm_put(Dst, 274, Dt20([reg_a]));
#line 918 "src/jit/emit_x64.dasc"
            } else {
                //| mov rax, WORK[reg_b];
                dasm_put(Dst, 938, Dt20([reg_b]));
#line 920 "src/jit/emit_x64.dasc"
                switch(ins->info->opcode) {
                case MVM_OP_add_i:
                    //| add rax, WORK[reg_c];
                    dasm_put(Dst, 994, Dt20([reg_c]));
#line 923 "src/jit/emit_x64.dasc"
                    break;
                case MVM_OP_sub_i:
                    //| sub rax, WORK[reg_c];
                    dasm_put(Dst, 999, Dt20([reg_c]));
#line 926 "src/jit/emit_x64.dasc"
                    break;
                case MVM_OP_bor_i:
                    //| or rax, WORK[reg_c];
                    dasm_put(Dst, 1004, Dt20([reg_c]));
#line 929 "src/jit/emit_x64.dasc"
                    break;
                case MVM_OP_band_i:
                    //| and rax, WORK[reg_c];
                    dasm_put(Dst, 1009, Dt20([reg_c]));
#line 932 "src/jit/emit_x64.dasc"
                    break;
                case MVM_OP_bxor_i:
                    //| xor rax, WORK[reg_c];
                    dasm_put(Dst, 1014, Dt20([reg_c]));
#line 935 "src/jit/emit_x64.dasc"
                    break;
                }
                //| mov WORK[reg_a], rax;
                dasm_put(Dst, 274, Dt20([reg_a]));
#line 938 "src/jit/emit_x64.dasc"
            }
        }
        break;
    }
    case MVM_OP_mul_i:
    case MVM_OP_blshift_i:
    case MVM_OP_brshift_i: {
        MVMint32 reg_a = ins->operands[0].reg.orig;
        MVMint32 reg_b = ins->operands[1].reg.orig;
        MVMint32 reg_c = ins->operands[2].reg.orig;
        //| mov rax, WORK[reg_b];
        dasm_put(Dst, 938, Dt20([reg_b]));
#line 949 "src/jit/emit_x64.dasc"
        switch(ins->info->opcode) {
        case MVM_OP_mul_i:
            //| imul rax, WORK[reg_c];
            dasm_put(Dst, 1019, Dt20([reg_c]));
#line 952 "src/jit/emit_x64.dasc"
            break;
        case MVM_OP_blshift_i:
            //| mov cl, byte WORK[reg_c];
            //| shl rax, cl;
            dasm_put(Dst, 1025, Dt20([reg_c]));
#line 956 "src/jit/emit_x64.dasc"
            break;
        case MVM_OP_brshift_i:
            //| mov cl, byte WORK[reg_c];
            //| shr rax, cl;
            dasm_put(Dst, 1032, Dt20([reg_c]));
#line 960 "src/jit/emit_x64.dasc"
            break;
        }
        //| mov WORK[reg_a], rax;
        dasm_put(Dst, 274, Dt20([reg_a]));
#line 963 "src/jit/emit_x64.dasc"
        break;
    }
    case MVM_OP_div_i: {
        MVMint16 dst = ins->operands[0].reg.orig;
        MVMint16 a   = ins->operands[1].reg.orig;
        MVMint16 b   = ins->operands[2].reg.orig;
        //| mov rax, WORK[a];
        //| mov rcx, WORK[b];
        //| cmp rcx, 0;
        //| jnz >1;
        //| throw_adhoc "Division by zero";
        dasm_put(Dst, 1039, Dt20([a]), Dt20([b]), (unsigned int)((uintptr_t)("Division by zero")), (unsigned int)(((uintptr_t)("Division by zero"))>>32));
        dasm_put(Dst, 206, (MVMuint32)((uintptr_t)(&MVM_exception_throw_adhoc)), (MVMuint32)((uintptr_t)(&MVM_exception_throw_adhoc) >> 32));
#line 974 "src/jit/emit_x64.dasc"
        //|1:
        dasm_put(Dst, 1066);
#line 975 "src/jit/emit_x64.dasc"
        /* either num < 0, or denom < 0, but not both */
        //| setl dh;
        //| cmp rax, 0;
        //| setl dl;
        //| xor dl, dh;
        //| movzx r8d, dl;
        //| cqo;
        //| idiv rcx;
        //| test rdx, rdx;
        //| setnz cl;
        //| and r8b, cl;
        dasm_put(Dst, 1074);
#line 986 "src/jit/emit_x64.dasc"
        /* r8 = bias = (modulo != 0) & ((num < 0) ^ (denom < 0)) */
        //| sub rax, r8;
        //| mov WORK[dst], rax;
        dasm_put(Dst, 1109, Dt20([dst]));
#line 989 "src/jit/emit_x64.dasc"
        break;
    }
    case MVM_OP_mod_i: {
        MVMint16 dst = ins->operands[0].reg.orig;
        MVMint16 a   = ins->operands[1].reg.orig;
        MVMint16 b   = ins->operands[2].reg.orig;
        //| mov rax, WORK[a];
        //| mov rcx, WORK[b];
        //| cmp rcx, 0;
        //| jnz >1;
        //| throw_adhoc "Division by zero";
        dasm_put(Dst, 1039, Dt20([a]), Dt20([b]), (unsigned int)((uintptr_t)("Division by zero")), (unsigned int)(((uintptr_t)("Division by zero"))>>32));
        dasm_put(Dst, 206, (MVMuint32)((uintptr_t)(&MVM_exception_throw_adhoc)), (MVMuint32)((uintptr_t)(&MVM_exception_throw_adhoc) >> 32));
#line 1000 "src/jit/emit_x64.dasc"
        //|1:
        //| cqo;
        //| idiv rcx;
        //| mov WORK[dst], rdx;
        dasm_put(Dst, 1117, Dt20([dst]));
#line 1004 "src/jit/emit_x64.dasc"
        break;
    }
    case MVM_OP_inc_i: {
         MVMint32 reg = ins->operands[0].reg.orig;
         //| add qword WORK[reg], 1;
         dasm_put(Dst, 1136, Dt20([reg]));
#line 1009 "src/jit/emit_x64.dasc"
         break;
    }
    case MVM_OP_dec_i: {
        MVMint32 reg = ins->operands[0].reg.orig;
        //| sub qword WORK[reg], 1;
        dasm_put(Dst, 1142, Dt20([reg]));
#line 1014 "src/jit/emit_x64.dasc"
        break;
    }
    case MVM_OP_bnot_i: {
        MVMint16 dst = ins->operands[0].reg.orig;
        MVMint16 src = ins->operands[1].reg.orig;
        //| mov TMP1, WORK[src];
        //| not TMP1;
        //| mov WORK[dst], TMP1;
        dasm_put(Dst, 1148, Dt20([src]), Dt20([dst]));
#line 1022 "src/jit/emit_x64.dasc"
        break;
    }
    case MVM_OP_neg_i: {
        MVMint16 dst = ins->operands[0].reg.orig;
        MVMint16 src = ins->operands[1].reg.orig;
        //| mov TMP1, WORK[src];
        //| neg TMP1;
        //| mov WORK[dst], TMP1;
        dasm_put(Dst, 1161, Dt20([src]), Dt20([dst]));
#line 1030 "src/jit/emit_x64.dasc"
        break;
    }
    case MVM_OP_extend_i32: {
        MVMint16 dst = ins->operands[0].reg.orig;
        MVMint16 src = ins->operands[1].reg.orig;
        //| mov RV, WORK[src];
        //| cdqe
        //| mov WORK[dst], RV;
        dasm_put(Dst, 1174, Dt20([src]), Dt20([dst]));
#line 1038 "src/jit/emit_x64.dasc"
        break;
    }
    case MVM_OP_trunc_i32: {
        MVMint16 dst = ins->operands[0].reg.orig;
        MVMint16 src = ins->operands[1].reg.orig;
        //| mov TMP1, WORK[src];
        dasm_put(Dst, 1185, Dt20([src]));
#line 1044 "src/jit/emit_x64.dasc"
        /* x86-64 auto-truncates the upper 32 bits when using registers in 32
         * bit mode */
        //| mov TMP2d, TMP1d;
        //| mov WORK[dst], TMP2;
        dasm_put(Dst, 1190, Dt20([dst]));
#line 1048 "src/jit/emit_x64.dasc"
        break;
    }
    case MVM_OP_add_n:
    case MVM_OP_sub_n:
    case MVM_OP_mul_n:
    case MVM_OP_div_n: {
        MVMint16 reg_a = ins->operands[0].reg.orig;
        MVMint16 reg_b = ins->operands[1].reg.orig;
        MVMint16 reg_c = ins->operands[2].reg.orig;
        /* Copying data to xmm (floating point) registers requires
         * a special move instruction */
        //| movsd xmm0, qword WORK[reg_b];
        dasm_put(Dst, 1197, Dt20([reg_b]));
#line 1060 "src/jit/emit_x64.dasc"
        switch(ins->info->opcode) {
        case MVM_OP_add_n:
            //| addsd xmm0, qword WORK[reg_c];
            dasm_put(Dst, 1204, Dt20([reg_c]));
#line 1063 "src/jit/emit_x64.dasc"
            break;
        case MVM_OP_sub_n:
            //| subsd xmm0, qword WORK[reg_c];
            dasm_put(Dst, 1211, Dt20([reg_c]));
#line 1066 "src/jit/emit_x64.dasc"
            break;
        case MVM_OP_mul_n:
            //| mulsd xmm0, qword WORK[reg_c];
            dasm_put(Dst, 1218, Dt20([reg_c]));
#line 1069 "src/jit/emit_x64.dasc"
            break;
        case MVM_OP_div_n:
            //| divsd xmm0, qword WORK[reg_c];
            dasm_put(Dst, 1225, Dt20([reg_c]));
#line 1072 "src/jit/emit_x64.dasc"
            break;
        }
        //| movsd qword WORK[reg_a], xmm0;
        dasm_put(Dst, 1232, Dt20([reg_a]));
#line 1075 "src/jit/emit_x64.dasc"
        break;
    }
    case MVM_OP_coerce_in: {
        MVMint16 dst = ins->operands[0].reg.orig;
        MVMint16 src = ins->operands[1].reg.orig;
        /* convert simple integer to double precision */
        //| cvtsi2sd xmm0, qword WORK[src];
        //| movsd qword WORK[dst], xmm0;
        dasm_put(Dst, 1239, Dt20([src]), Dt20([dst]));
#line 1083 "src/jit/emit_x64.dasc"
        break;
    }
    case MVM_OP_coerce_ni: {
        MVMint16 dst = ins->operands[0].reg.orig;
        MVMint16 src = ins->operands[1].reg.orig;
        /* convert double precision to simple intege */
        //| cvttsd2si rax, qword WORK[src];
        //| mov WORK[dst], rax;
        dasm_put(Dst, 1253, Dt20([src]), Dt20([dst]));
#line 1091 "src/jit/emit_x64.dasc"
        break;
    }
    case MVM_OP_neg_n: {
        /* Negation is xor-ing the highest byte. Pretty simple right */
        MVMint16 dst = ins->operands[0].reg.orig;
        MVMint16 src = ins->operands[1].reg.orig;
        //| mov TMP1, 1;
        //| sal TMP1, 63;
        //| mov TMP2, qword WORK[src];
        //| xor TMP2, TMP1;
        //| mov qword WORK[dst], TMP2;
        dasm_put(Dst, 1265, Dt20([src]), Dt20([dst]));
#line 1102 "src/jit/emit_x64.dasc"
        break;
    }
    case MVM_OP_eq_i:
    case MVM_OP_eqaddr:
    case MVM_OP_ne_i:
    case MVM_OP_lt_i:
    case MVM_OP_le_i:
    case MVM_OP_gt_i:
    case MVM_OP_ge_i: {
        MVMint32 reg_a = ins->operands[0].reg.orig;
        MVMint32 reg_b = ins->operands[1].reg.orig;
        MVMint32 reg_c = ins->operands[2].reg.orig;
        //| mov rax, WORK[reg_b];
        dasm_put(Dst, 938, Dt20([reg_b]));
#line 1115 "src/jit/emit_x64.dasc"
        /* comparison result in the setting bits in the rflags register */
        //| cmp rax, WORK[reg_c];
        dasm_put(Dst, 1288, Dt20([reg_c]));
#line 1117 "src/jit/emit_x64.dasc"
        /* copy the right comparison bit to the lower byte of the rax
           register */
        switch(ins->info->opcode) {
        case MVM_OP_eqaddr:
        case MVM_OP_eq_i:
            //| sete al;
            dasm_put(Dst, 1293);
#line 1123 "src/jit/emit_x64.dasc"
            break;
        case MVM_OP_ne_i:
            //| setne al;
            dasm_put(Dst, 1297);
#line 1126 "src/jit/emit_x64.dasc"
            break;
        case MVM_OP_lt_i:
            //| setl al;
            dasm_put(Dst, 1301);
#line 1129 "src/jit/emit_x64.dasc"
            break;
        case MVM_OP_le_i:
            //| setle al;
            dasm_put(Dst, 1305);
#line 1132 "src/jit/emit_x64.dasc"
            break;
        case MVM_OP_gt_i:
            //| setg al;
            dasm_put(Dst, 1309);
#line 1135 "src/jit/emit_x64.dasc"
            break;
        case MVM_OP_ge_i:
            //| setge al;
            dasm_put(Dst, 1313);
#line 1138 "src/jit/emit_x64.dasc"
            break;
        }
        /* zero extend al (lower byte) to rax (whole register) */
        //| movzx rax, al;
        //| mov WORK[reg_a], rax;
        dasm_put(Dst, 1317, Dt20([reg_a]));
#line 1143 "src/jit/emit_x64.dasc"
        break;
    }
    case MVM_OP_cmp_i : {
        MVMint32 reg_a = ins->operands[0].reg.orig;
        MVMint32 reg_b = ins->operands[1].reg.orig;
        MVMint32 reg_c = ins->operands[2].reg.orig;
        //| mov TMP1, WORK[reg_b];
        dasm_put(Dst, 1185, Dt20([reg_b]));
#line 1150 "src/jit/emit_x64.dasc"
        /* comparison result in the setting bits in the rflags register */
        //| cmp TMP1, WORK[reg_c];
        dasm_put(Dst, 1326, Dt20([reg_c]));
#line 1152 "src/jit/emit_x64.dasc"
        /* copy the right comparison bit to the lower byte of the rax
           register */
        //| setg TMP2b;
        //| movzx TMP2, TMP2b;
        //| setl TMP3b;
        //| movzx TMP3, TMP3b;
        //| sub TMP2, TMP3;
        //| mov WORK[reg_a], TMP2;
        dasm_put(Dst, 1331, Dt20([reg_a]));
#line 1160 "src/jit/emit_x64.dasc"
        break;
    }
    case MVM_OP_gt_s:
    case MVM_OP_ge_s:
    case MVM_OP_lt_s:
    case MVM_OP_le_s: {
        /* src/jit/graph.c already put a call to the MVM_string_compare
           function into the graph, so here we just have to deal with the
           returned integers. */
        MVMint32 reg = ins->operands[0].reg.orig;
        switch(ins->info->opcode) {
            case MVM_OP_gt_s:
                //| mov TMP2, 1;
                dasm_put(Dst, 1354);
#line 1173 "src/jit/emit_x64.dasc"
                break;
            case MVM_OP_lt_s:
                //| mov TMP2, -1;
                dasm_put(Dst, 1362);
#line 1176 "src/jit/emit_x64.dasc"
                break;
            case MVM_OP_ge_s: case MVM_OP_le_s:
                //| mov TMP2, 0;
                dasm_put(Dst, 1374);
#line 1179 "src/jit/emit_x64.dasc"
                break;
        }
        //| cmp TMP2, WORK[reg];
        dasm_put(Dst, 1382, Dt20([reg]));
#line 1182 "src/jit/emit_x64.dasc"
        /* Mind the reversedness of the constant and the value as compared to
         * interp.c */
        switch(ins->info->opcode) {
            case MVM_OP_gt_s:
                //| sete al;
                dasm_put(Dst, 1293);
#line 1187 "src/jit/emit_x64.dasc"
                break;
            case MVM_OP_ge_s:
                //| setle al;
                dasm_put(Dst, 1305);
#line 1190 "src/jit/emit_x64.dasc"
                break;
            case MVM_OP_lt_s:
                //| sete al;
                dasm_put(Dst, 1293);
#line 1193 "src/jit/emit_x64.dasc"
                break;
            case MVM_OP_le_s:
                //| setge al;
                dasm_put(Dst, 1313);
#line 1196 "src/jit/emit_x64.dasc"
                break;
        }
        //| movzx rax, al;
        //| mov WORK[reg], rax;
        dasm_put(Dst, 1317, Dt20([reg]));
#line 1200 "src/jit/emit_x64.dasc"
        break;
    }
    case MVM_OP_not_i: {
        MVMint16 dst = ins->operands[0].reg.orig;
        MVMint16 src = ins->operands[1].reg.orig;
        //| mov TMP1, WORK[src];
        //| test TMP1, TMP1;
        //| setz TMP2b;
        //| movzx TMP2, TMP2b;
        //| mov WORK[dst], TMP2;
        dasm_put(Dst, 889, Dt20([src]), Dt20([dst]));
#line 1210 "src/jit/emit_x64.dasc"
        break;
    }
    case MVM_OP_eq_n:
    case MVM_OP_ne_n:
    case MVM_OP_le_n:
    case MVM_OP_lt_n:
    case MVM_OP_ge_n:
    case MVM_OP_gt_n: {
        MVMint16 dst = ins->operands[0].reg.orig;
        MVMint16 a   = ins->operands[1].reg.orig;
        MVMint16 b   = ins->operands[2].reg.orig;
        if (op == MVM_OP_eq_n) {
            //| mov TMP1, 0;
            dasm_put(Dst, 1387);
#line 1223 "src/jit/emit_x64.dasc"
        } else if (op == MVM_OP_ne_n) {
            //| mov TMP1, 1;
            dasm_put(Dst, 1395);
#line 1225 "src/jit/emit_x64.dasc"
        }
        if (op == MVM_OP_lt_n || op == MVM_OP_le_n) {
            //| movsd xmm0, qword WORK[b];
            //| ucomisd xmm0, qword WORK[a];
            dasm_put(Dst, 1403, Dt20([b]), Dt20([a]));
#line 1229 "src/jit/emit_x64.dasc"
        } else {
            //| movsd xmm0, qword WORK[a];
            //| ucomisd xmm0, qword WORK[b];
            dasm_put(Dst, 1403, Dt20([a]), Dt20([b]));
#line 1232 "src/jit/emit_x64.dasc"
        }

        if (op == MVM_OP_le_n || op == MVM_OP_ge_n) {
            //| setae TMP1b;
            dasm_put(Dst, 1415);
#line 1236 "src/jit/emit_x64.dasc"
        } else if (op == MVM_OP_eq_n) {
            //| setnp TMP2b; // zero if either is NaN, 1 otherwise
            //| cmove TMP1, TMP2; // if equal, overwrite 0 with 1
            dasm_put(Dst, 1419);
#line 1239 "src/jit/emit_x64.dasc"
        } else if (op == MVM_OP_ne_n) {
            //| setp TMP2b; // 1 if either is NaN (in which case they can't be equal)
            //| cmove TMP1, TMP2; // if equal, overwrite 1 with IsNan(a) | IsNaN(b)
            dasm_put(Dst, 1427);
#line 1242 "src/jit/emit_x64.dasc"
        } else {
            //| seta TMP1b;
            dasm_put(Dst, 1435);
#line 1244 "src/jit/emit_x64.dasc"
        }
        //| movzx TMP1, TMP1b;
        //| mov WORK[dst], TMP1;
        dasm_put(Dst, 1439, Dt20([dst]));
#line 1247 "src/jit/emit_x64.dasc"
        break;
    }
    case MVM_OP_cmp_n: {
        MVMint16 dst = ins->operands[0].reg.orig;
        MVMint16 a   = ins->operands[1].reg.orig;
        MVMint16 b   = ins->operands[2].reg.orig;
        //| movsd xmm0, qword WORK[a];
        //| movsd xmm1, qword WORK[b];
        //| ucomisd xmm0, xmm1
        //| seta TMP1b;
        //| movzx rax, TMP1b;
        //| ucomisd xmm1, xmm0
        //| seta TMP1b;
        //| movzx TMP1, TMP1b;
        //| sub rax, TMP1;
        //| mov WORK[dst], rax;
        dasm_put(Dst, 1448, Dt20([a]), Dt20([b]), Dt20([dst]));
#line 1263 "src/jit/emit_x64.dasc"
        break;
    }
    case MVM_OP_eq_I:
    case MVM_OP_ne_I:
    case MVM_OP_lt_I:
    case MVM_OP_le_I:
    case MVM_OP_gt_I:
    case MVM_OP_ge_I: {
        MVMint32 reg_a = ins->operands[0].reg.orig;
        MVMint32 reg_b = ins->operands[1].reg.orig;
        MVMint32 reg_c = ins->operands[2].reg.orig;
        /* Call the bigint comparison function. */
        //| mov ARG1, tc;
        //| mov ARG2, WORK[reg_b];
        //| mov ARG3, WORK[reg_c];
        //| callp &MVM_bigint_cmp;
        dasm_put(Dst, 1490, tc, Dt20([reg_b]), Dt20([reg_c]));
        dasm_put(Dst, 206, (MVMuint32)((uintptr_t)(&MVM_bigint_cmp)), (MVMuint32)((uintptr_t)(&MVM_bigint_cmp) >> 32));
        dasm_put(Dst, 212);
#line 1279 "src/jit/emit_x64.dasc"
        /* Handle result by opcode. */
        switch(ins->info->opcode) {
        case MVM_OP_eq_I:
            //| cmp RV, MP_EQ
            //| sete al;
            dasm_put(Dst, 1504, MP_EQ);
#line 1284 "src/jit/emit_x64.dasc"
            break;
        case MVM_OP_ne_I:
            //| cmp RV, MP_EQ
            //| setne al;
            dasm_put(Dst, 1513, MP_EQ);
#line 1288 "src/jit/emit_x64.dasc"
            break;
        case MVM_OP_lt_I:
            //| cmp RV, MP_LT
            //| sete al;
            dasm_put(Dst, 1504, MP_LT);
#line 1292 "src/jit/emit_x64.dasc"
            break;
        case MVM_OP_le_I:
            //| cmp RV, MP_GT
            //| setne al;
            dasm_put(Dst, 1513, MP_GT);
#line 1296 "src/jit/emit_x64.dasc"
            break;
        case MVM_OP_gt_I:
            //| cmp RV, MP_GT
            //| sete al;
            dasm_put(Dst, 1504, MP_GT);
#line 1300 "src/jit/emit_x64.dasc"
            break;
        case MVM_OP_ge_I:
            //| cmp RV, MP_LT
            //| setne al;
            dasm_put(Dst, 1513, MP_LT);
#line 1304 "src/jit/emit_x64.dasc"
            break;
        }
        /* zero extend al (lower byte) to rax (whole register) */
        //| movzx rax, al;
        //| mov WORK[reg_a], rax;
        dasm_put(Dst, 1317, Dt20([reg_a]));
#line 1309 "src/jit/emit_x64.dasc"
        break;
    }
    case MVM_OP_isint:
    case MVM_OP_isnum:
    case MVM_OP_isstr:
    case MVM_OP_islist:
    case MVM_OP_ishash: {
        MVMint16 dst = ins->operands[0].reg.orig;
        MVMint16 obj = ins->operands[1].reg.orig;
        MVMint32 reprid = op == MVM_OP_isint ? MVM_REPR_ID_P6int :
                          op == MVM_OP_isnum ? MVM_REPR_ID_P6num :
                          op == MVM_OP_isstr ? MVM_REPR_ID_P6str :
                          op == MVM_OP_islist ? MVM_REPR_ID_VMArray :
                     /*  op == MVM_OP_ishash */ MVM_REPR_ID_MVMHash;
        //| mov TMP1, aword WORK[obj];
        //| test TMP1, TMP1;
        //| jz >1;
        //| mov TMP1, OBJECT:TMP1->st;
        //| mov TMP1, STABLE:TMP1->REPR;
        //| cmp qword REPR:TMP1->ID, reprid;
        //| jne >1;
        //| mov qword WORK[dst], 1;
        //| jmp >2;
        //|1:
        //| mov qword WORK[dst], 0;
        //|2:
        dasm_put(Dst, 1522, Dt20([obj]), DtE(->st), Dt11(->REPR), Dt12(->ID), reprid, Dt20([dst]), Dt20([dst]));
#line 1335 "src/jit/emit_x64.dasc"
        break;
    }
    case MVM_OP_sp_boolify_iter_arr: {
        MVMint16 dst = ins->operands[0].reg.orig;
        MVMint16 obj = ins->operands[1].reg.orig;
        //| mov TMP1, aword WORK[obj];
        //| mov TMP2, MVMITER:TMP1->body.array_state.index;
        //| add TMP2, 1;
        //| mov TMP3, MVMITER:TMP1->body.array_state.limit;
        dasm_put(Dst, 1575, Dt20([obj]), DtB(->body.array_state.index), DtB(->body.array_state.limit));
#line 1344 "src/jit/emit_x64.dasc"
        /* index - limit will give a carry flag when index < limit */
        //| cmp TMP2, TMP3;
        //| setl TMP1b;
        //| movzx TMP1, TMP1b;
        //| mov aword WORK[dst], TMP1;
        dasm_put(Dst, 1592, Dt20([dst]));
#line 1349 "src/jit/emit_x64.dasc"
        break;
    }
    case MVM_OP_sp_boolify_iter_hash: {
        MVMint16 dst = ins->operands[0].reg.orig;
        MVMint16 obj = ins->operands[1].reg.orig;
        //| mov TMP1, aword WORK[obj];
        //| mov TMP2, MVMITER:TMP1->body.hash_state.next;
        //| test TMP2, TMP2;
        //| setnz TMP2b;
        //| movzx TMP2, TMP2b;
        //| mov aword WORK[dst], TMP2;
        dasm_put(Dst, 1607, Dt20([obj]), DtB(->body.hash_state.next), Dt20([dst]));
#line 1360 "src/jit/emit_x64.dasc"
        break;
    }
    case MVM_OP_objprimspec: {
        MVMint16 dst  = ins->operands[0].reg.orig;
        MVMint16 type = ins->operands[1].reg.orig;
        //| mov TMP6, aword WORK[type];
        //| test TMP6, TMP6;
        //| jz >1;
        //| mov ARG2, OBJECT:TMP6->st;
        //| mov FUNCTION, STABLE:ARG2->REPR;
        //| mov FUNCTION, REPR:FUNCTION->get_storage_spec;
        //| mov ARG1, TC;
        //| call FUNCTION;
        //| movzx TMP6, word STORAGESPEC:RV->boxed_primitive;
        //|1:
        //| mov aword WORK[dst], TMP6;
        dasm_put(Dst, 1630, Dt20([type]), DtE(->st), Dt11(->REPR), Dt12(->get_storage_spec), Dt16(->boxed_primitive), Dt20([dst]));
#line 1376 "src/jit/emit_x64.dasc"
        break;
    }
    case MVM_OP_objprimbits: {
        MVMint16 dst  = ins->operands[0].reg.orig;
        MVMint16 type = ins->operands[1].reg.orig;
        //| mov TMP6, aword WORK[type];
        //| test TMP6, TMP6;
        //| jz >1;
        //| mov ARG2, OBJECT:TMP6->st;
        //| mov FUNCTION, STABLE:ARG2->REPR;
        //| mov FUNCTION, REPR:FUNCTION->get_storage_spec;
        //| mov ARG1, TC;
        //| call FUNCTION;
        //| movzx TMP6, word STORAGESPEC:RV->boxed_primitive;
        //| test TMP6, TMP6;
        //| jz >1;
        //| movzx TMP6, word STORAGESPEC:RV->bits;
        //|1:
        //| mov aword WORK[dst], TMP6;
        dasm_put(Dst, 1673, Dt20([type]), DtE(->st), Dt11(->REPR), Dt12(->get_storage_spec), Dt16(->boxed_primitive), Dt16(->bits), Dt20([dst]));
#line 1395 "src/jit/emit_x64.dasc"
        break;
    }
    case MVM_OP_isnonnull: {
        MVMint16 dst = ins->operands[0].reg.orig;
        MVMint16 obj = ins->operands[1].reg.orig;
        //| mov TMP1, WORK[obj];
        //| test TMP1, TMP1;
        //| setnz TMP2b;
        //| get_vmnull TMP3;
        //| cmp TMP1, TMP3;
        //| setne TMP3b;
        //| and TMP2b, TMP3b;
        //| movzx TMP2, TMP2b;
        //| mov WORK[dst], TMP2;
        dasm_put(Dst, 1728, Dt20([obj]), Dt1F(->instance), DtC(->VMNull), Dt20([dst]));
#line 1409 "src/jit/emit_x64.dasc"
        break;
    }
    case MVM_OP_isnull: {
        MVMint16 dst = ins->operands[0].reg.orig;
        MVMint16 obj = ins->operands[1].reg.orig;
        //| mov TMP1, WORK[obj];
        //| test TMP1, TMP1;
        //| setz TMP2b;
        //| get_vmnull TMP3;
        //| cmp TMP1, TMP3;
        //| sete TMP3b;
        //| or TMP2b, TMP3b;
        //| movzx TMP2, TMP2b;
        //| mov WORK[dst], TMP2;
        dasm_put(Dst, 1765, Dt20([obj]), Dt1F(->instance), DtC(->VMNull), Dt20([dst]));
#line 1423 "src/jit/emit_x64.dasc"
        break;
    }
    case MVM_OP_sp_fastcreate: {
        MVMint16 dst       = ins->operands[0].reg.orig;
        MVMuint16 size     = ins->operands[1].lit_i16;
        MVMint16 spesh_idx = ins->operands[2].lit_i16;
        //| mov ARG1, TC;
        //| mov ARG2, size;
        //| callp &MVM_gc_allocate_zeroed;
        dasm_put(Dst, 1802, size);
        dasm_put(Dst, 206, (MVMuint32)((uintptr_t)(&MVM_gc_allocate_zeroed)), (MVMuint32)((uintptr_t)(&MVM_gc_allocate_zeroed) >> 32));
#line 1432 "src/jit/emit_x64.dasc"
        //| get_spesh_slot TMP1, spesh_idx;
        //| mov aword OBJECT:RV->st, TMP1;  // st is 64 bit (pointer)
        //| mov word OBJECT:RV->header.size, size; // object size is 16 bit
        //| mov TMP1d, dword TC->thread_id;  // thread id is 32 bit
        //| mov dword OBJECT:RV->header.owner, TMP1d; // does this even work?
        //| mov aword WORK[dst], RV; // store in local register
        dasm_put(Dst, 1812, Dt1F(->cur_frame), Dt2(->effective_spesh_slots), Dt14([spesh_idx]), DtE(->st), DtE(->header.size), size, Dt1F(->thread_id), DtE(->header.owner), Dt20([dst]));
#line 1438 "src/jit/emit_x64.dasc"
        break;
    }
    case MVM_OP_decont:
    case MVM_OP_sp_decont: {
        MVMint16 dst = ins->operands[0].reg.orig;
        MVMint16 src = ins->operands[1].reg.orig;
        //| mov TMP5, WORK[src];
        //| test TMP5, TMP5;
        dasm_put(Dst, 1850, Dt20([src]));
#line 1446 "src/jit/emit_x64.dasc"
        // obj is null
        //| jz >1;
        //| is_type_object TMP5;
        dasm_put(Dst, 1858, DtE(->header.flags), MVM_CF_TYPE_OBJECT);
#line 1449 "src/jit/emit_x64.dasc"
        // object is type object (not concrete)
        //| jnz >1;
        //| mov TMP6, OBJECT:TMP5->st;
        //| mov TMP6, STABLE:TMP6->container_spec;
        //| test TMP6, TMP6;
        dasm_put(Dst, 1870, DtE(->st), Dt11(->container_spec));
#line 1454 "src/jit/emit_x64.dasc"
        // container spec is zero
        //| jz >1;
        //| mov ARG1, TC;
        //| mov ARG2, TMP5;      // object
        //| lea ARG3, WORK[dst]; // destination register
        //| mov FUNCTION, CONTAINERSPEC:TMP6->fetch; // get function pointer
        //| call FUNCTION;
        //| jmp >2;
        //|1:
        dasm_put(Dst, 1886, Dt20([dst]), Dt15(->fetch));
#line 1463 "src/jit/emit_x64.dasc"
        // otherwise just move the object into the register
        //| mov WORK[dst], TMP5;
        //|2:
        dasm_put(Dst, 1916, Dt20([dst]));
#line 1466 "src/jit/emit_x64.dasc"
        break;
    }
    case MVM_OP_iscont: {
        MVMint16 dst = ins->operands[0].reg.orig;
        MVMint16 obj = ins->operands[1].reg.orig;
        //| mov TMP1, aword WORK[obj];
        //| test TMP1, TMP1;
        //| jz >1;
        //| mov TMP1, OBJECT:TMP1->st;
        //| mov TMP1, STABLE:TMP1->container_spec;
        //| test TMP1, TMP1;
        //|1:
        //| setnz TMP1b;
        //| movzx TMP1, TMP1b;
        //| mov qword WORK[dst], TMP1;
        dasm_put(Dst, 1923, Dt20([obj]), DtE(->st), Dt11(->container_spec), Dt20([dst]));
#line 1481 "src/jit/emit_x64.dasc"
        break;
    }
    case MVM_OP_sp_findmeth: {
        MVMint16 dst = ins->operands[0].reg.orig;
        MVMint16 obj = ins->operands[1].reg.orig;
        MVMint32 str_idx = ins->operands[2].lit_str_idx;
        MVMuint16 ss_idx = ins->operands[3].lit_i16;
        //| get_spesh_slot TMP1, ss_idx;
        //| mov TMP2, WORK[obj];
        //| mov TMP2, OBJECT:TMP2->st;
        //| cmp TMP1, TMP2;
        //| jne >1;
        //| get_spesh_slot TMP3, ss_idx + 1;
        //| mov WORK[dst], TMP3;
        //| jmp >2;
        //|1:
        dasm_put(Dst, 1959, Dt1F(->cur_frame), Dt2(->effective_spesh_slots), Dt14([ss_idx]), Dt20([obj]), DtE(->st), Dt1F(->cur_frame), Dt2(->effective_spesh_slots), Dt14([ss_idx + 1]), Dt20([dst]));
#line 1497 "src/jit/emit_x64.dasc"
        /* assign invokish label first */
        //| mov rax, TC->cur_frame;
        //| lea TMP6, [>2];
        //| mov aword FRAME:rax->jit_entry_label, TMP6;
        dasm_put(Dst, 2009, Dt1F(->cur_frame), Dt2(->jit_entry_label));
#line 1501 "src/jit/emit_x64.dasc"
        /* call find_method_spesh */
        //| mov ARG1, TC;
        //| mov ARG2, WORK[obj];
        //| get_string ARG3, str_idx;
        dasm_put(Dst, 2023, Dt20([obj]));
         MVM_cu_ensure_string_decoded(tc, jg->sg->sf->body.cu, str_idx);
#line 1505 "src/jit/emit_x64.dasc"
        //| mov ARG4, ss_idx;
        //| lea TMP6, WORK[dst];
        //|.if WIN32;
        //| mov qword [rsp+0x20], TMP6;
        //|.else;
        //| mov ARG5, TMP6;
        //|.endif
        //| callp &MVM_6model_find_method_spesh;
        dasm_put(Dst, 2032, Dt21(->body.strings), Dt13([str_idx]), ss_idx, Dt20([dst]));
        dasm_put(Dst, 206, (MVMuint32)((uintptr_t)(&MVM_6model_find_method_spesh)), (MVMuint32)((uintptr_t)(&MVM_6model_find_method_spesh) >> 32));
#line 1513 "src/jit/emit_x64.dasc"
        //| test RV, RV;
        dasm_put(Dst, 2053);
#line 1514 "src/jit/emit_x64.dasc"
        /* fall out to interpreter */
        //| jnz ->out;
        //|2:
        dasm_put(Dst, 2062);
#line 1517 "src/jit/emit_x64.dasc"
        break;
    }
    case MVM_OP_isconcrete: {
        MVMint16 dst = ins->operands[0].reg.orig;
        MVMint16 obj = ins->operands[1].reg.orig;
        //| mov TMP1, WORK[obj];
        //| test TMP1, TMP1;
        //| jz >1;
        //| is_type_object TMP1;
        //| jnz >1;
        //| mov qword WORK[dst], 1;
        //| jmp >2;
        //|1:
        //| mov qword WORK[dst], 0;
        //|2:
        dasm_put(Dst, 2069, Dt20([obj]), DtE(->header.flags), MVM_CF_TYPE_OBJECT, Dt20([dst]), Dt20([dst]));
#line 1532 "src/jit/emit_x64.dasc"
        break;
    }
    case MVM_OP_takehandlerresult: {
        MVMint16 dst = ins->operands[0].reg.orig;
        //| mov TMP1, aword TC->last_handler_result;
        //| mov aword WORK[dst], TMP1;
        //| mov aword TC->last_handler_result, 0;
        dasm_put(Dst, 2115, Dt1F(->last_handler_result), Dt20([dst]), Dt1F(->last_handler_result));
#line 1539 "src/jit/emit_x64.dasc"
        break;
    }
    case MVM_OP_exception: {
        MVMint16 dst = ins->operands[0].reg.orig;
        //| mov TMP1, TC->active_handlers;
        //| test TMP1, TMP1;
        //| jz >1;
        //| mov TMP1, MVMACTIVEHANDLERS:TMP1->ex_obj;
        //| mov WORK[dst], TMP1;
        //| jmp >2;
        //|1:
        //| get_vmnull TMP1;
        //| mov WORK[dst], TMP1;
        //|2:
        dasm_put(Dst, 2132, Dt1F(->active_handlers), DtD(->ex_obj), Dt20([dst]), Dt1F(->instance), DtC(->VMNull), Dt20([dst]));
#line 1553 "src/jit/emit_x64.dasc"
        break;
    }
    case MVM_OP_scwbdisable: {
        MVMint16 dst = ins->operands[0].reg.orig;
        //| mov TMP1d, dword TC->sc_wb_disable_depth;
        //| add TMP1d, 1;
        //| mov dword TC->sc_wb_disable_depth, TMP1d;
        //| mov qword WORK[dst], TMP1;
        dasm_put(Dst, 2172, Dt1F(->sc_wb_disable_depth), Dt1F(->sc_wb_disable_depth), Dt20([dst]));
#line 1561 "src/jit/emit_x64.dasc"
        break;
    }
    case MVM_OP_scwbenable: {
        MVMint16 dst = ins->operands[0].reg.orig;
        //| mov TMP1d, dword TC->sc_wb_disable_depth; // should do zero-extension
        //| sub TMP1d, 1;
        //| mov dword TC->sc_wb_disable_depth, TMP1d;
        //| mov qword WORK[dst], TMP1;
        dasm_put(Dst, 2188, Dt1F(->sc_wb_disable_depth), Dt1F(->sc_wb_disable_depth), Dt20([dst]));
#line 1569 "src/jit/emit_x64.dasc"
        break;
    }
    case MVM_OP_assign:
    case MVM_OP_assignunchecked: {
        MVMint16 cont = ins->operands[0].reg.orig;
        MVMint16 obj  = ins->operands[1].reg.orig;
        //| mov ARG2, aword WORK[cont];
        //| mov FUNCTION, OBJECT:ARG2->st;
        //| mov FUNCTION, STABLE:FUNCTION->container_spec;
        //| test FUNCTION, FUNCTION;
        //| jnz >1;
        //| throw_adhoc "Cannot assign to an immutable value";
        dasm_put(Dst, 2205, Dt20([cont]), DtE(->st), Dt11(->container_spec), (unsigned int)((uintptr_t)("Cannot assign to an immutable value")), (unsigned int)(((uintptr_t)("Cannot assign to an immutable value"))>>32));
        dasm_put(Dst, 206, (MVMuint32)((uintptr_t)(&MVM_exception_throw_adhoc)), (MVMuint32)((uintptr_t)(&MVM_exception_throw_adhoc) >> 32));
#line 1581 "src/jit/emit_x64.dasc"
        //|1:
        //| mov ARG1, TC;
        //| mov ARG3, aword WORK[obj];
        dasm_put(Dst, 2234, Dt20([obj]));
#line 1584 "src/jit/emit_x64.dasc"
        if (op == MVM_OP_assign) {
            //| mov FUNCTION, CONTAINERSPEC:FUNCTION->store;
            dasm_put(Dst, 180, Dt15(->store));
#line 1586 "src/jit/emit_x64.dasc"
        } else {
            //| mov FUNCTION, CONTAINERSPEC:FUNCTION->store_unchecked;
            dasm_put(Dst, 180, Dt15(->store_unchecked));
#line 1588 "src/jit/emit_x64.dasc"
        }
        //| call FUNCTION;
        dasm_put(Dst, 2250);
#line 1590 "src/jit/emit_x64.dasc"
        break;
    }
    case MVM_OP_getlexstatic_o:
    case MVM_OP_getlexperinvtype_o: {
        MVMint16 dst  = ins->operands[0].reg.orig;
        MVMint16 name = ins->operands[1].reg.orig;
        //| mov ARG1, TC;
        //| mov ARG2, aword WORK[name];
        //| mov ARG3, MVM_reg_obj;
        //| callp &MVM_frame_find_lexical_by_name;
        dasm_put(Dst, 2255, Dt20([name]), MVM_reg_obj);
        dasm_put(Dst, 206, (MVMuint32)((uintptr_t)(&MVM_frame_find_lexical_by_name)), (MVMuint32)((uintptr_t)(&MVM_frame_find_lexical_by_name) >> 32));
#line 1600 "src/jit/emit_x64.dasc"
        //| test RV, RV;
        //| jz >1;
        //| mov RV, [RV];
        //|1:
        //| mov WORK[dst], RV;
        dasm_put(Dst, 257, Dt20([dst]));
#line 1605 "src/jit/emit_x64.dasc"
        break;
    }
    case MVM_OP_paramnamesused:
        //| mov ARG2, TC->cur_frame;
        //| lea ARG2, FRAME:ARG2->params;
        //| mov TMP5w, word ARGCTX:ARG2->num_pos;
        //| cmp TMP5w, word ARGCTX:ARG2->arg_count;
        //| je >1;
        //| mov ARG1, TC;
        //| callp &MVM_args_assert_nameds_used;
        dasm_put(Dst, 2269, Dt1F(->cur_frame), Dt2(->params), Dt3(->num_pos), Dt3(->arg_count));
        dasm_put(Dst, 206, (MVMuint32)((uintptr_t)(&MVM_args_assert_nameds_used)), (MVMuint32)((uintptr_t)(&MVM_args_assert_nameds_used) >> 32));
#line 1615 "src/jit/emit_x64.dasc"
        //|1:
        dasm_put(Dst, 1066);
#line 1616 "src/jit/emit_x64.dasc"
        break;
    case MVM_OP_assertparamcheck: {
        MVMint16 ok = ins->operands[0].reg.orig;
        //| mov TMP1, qword WORK[ok];
        //| test TMP1, TMP1;
        //| jnz >1;
        //| mov ARG1, TC;
        //| callp &MVM_args_bind_failed;
        dasm_put(Dst, 2297, Dt20([ok]));
        dasm_put(Dst, 206, (MVMuint32)((uintptr_t)(&MVM_args_bind_failed)), (MVMuint32)((uintptr_t)(&MVM_args_bind_failed) >> 32));
#line 1624 "src/jit/emit_x64.dasc"
        //|1:
        dasm_put(Dst, 1066);
#line 1625 "src/jit/emit_x64.dasc"
        break;
    }
    case MVM_OP_prof_enterspesh:
        //| mov ARG1, TC;
        //| mov ARG2, TC->cur_frame;
        //| mov ARG2, aword FRAME:ARG2->static_info;
        //| mov ARG3, aword MVM_PROFILE_ENTER_JIT;
        //| callp &MVM_profile_log_enter;
        dasm_put(Dst, 2314, Dt1F(->cur_frame), Dt2(->static_info), MVM_PROFILE_ENTER_JIT);
        dasm_put(Dst, 206, (MVMuint32)((uintptr_t)(&MVM_profile_log_enter)), (MVMuint32)((uintptr_t)(&MVM_profile_log_enter) >> 32));
        dasm_put(Dst, 212);
#line 1633 "src/jit/emit_x64.dasc"
        break;
    case MVM_OP_prof_enterinline: {
        MVMint16 spesh_idx = ins->operands[0].lit_i16;
        //| mov ARG1, TC;
        //| get_spesh_slot ARG2, spesh_idx;
        //| mov ARG3, aword MVM_PROFILE_ENTER_JIT_INLINE;
        //| callp &MVM_profile_log_enter;
        dasm_put(Dst, 2332, Dt1F(->cur_frame), Dt2(->effective_spesh_slots), Dt14([spesh_idx]), MVM_PROFILE_ENTER_JIT_INLINE);
        dasm_put(Dst, 206, (MVMuint32)((uintptr_t)(&MVM_profile_log_enter)), (MVMuint32)((uintptr_t)(&MVM_profile_log_enter) >> 32));
        dasm_put(Dst, 212);
#line 1640 "src/jit/emit_x64.dasc"
        break;
    }
    case MVM_OP_getobjsc: {
        MVMint16 dst = ins->operands[0].reg.orig;
        MVMint16 obj = ins->operands[1].reg.orig;
        //| mov TMP1, aword WORK[obj];
        //| mov TMP2d, dword COLLECTABLE:TMP1->sc_forward_u.sc.sc_idx;
        //| xor TMP3, TMP3;
        //| cmp TMP2d, 0;
        //| jle >1;
        //| mov TMP3, aword TC->instance;
        //| mov TMP3, aword MVMINSTANCE:TMP3->all_scs;
        //| mov TMP3, aword [TMP3 + TMP2d * 8];
        //| mov TMP3, SCREFBODY:TMP3->sc;
        //|1:
        //| mov aword WORK[dst], TMP3;
        dasm_put(Dst, 2354, Dt20([obj]), Dt10(->sc_forward_u.sc.sc_idx), Dt1F(->instance), DtC(->all_scs), Dt18(->sc), Dt20([dst]));
#line 1656 "src/jit/emit_x64.dasc"
        break;
    }
    case MVM_OP_invokewithcapture: {
        MVMint16 dest    = ins->operands[0].reg.orig;
        MVMint16 code    = ins->operands[1].reg.orig;
        MVMint16 capture = ins->operands[2].reg.orig;
        //| mov TMP1, aword WORK[capture];
        dasm_put(Dst, 1185, Dt20([capture]));
#line 1663 "src/jit/emit_x64.dasc"
        /* if (IS_CONCRETE(capture) && REPR(capture)->ID == MVM_REPR_ID_MVMCallCapture) */
        //| is_type_object TMP1;
        //| jnz >1;
        //| mov TMP2, OBJECT:TMP1->st;
        //| mov TMP2, STABLE:TMP2->REPR;
        //| cmp dword REPR:TMP2->ID, MVM_REPR_ID_MVMCallCapture;
        //| je >2;
        //|1:
        dasm_put(Dst, 2395, DtE(->header.flags), MVM_CF_TYPE_OBJECT, DtE(->st), Dt11(->REPR), Dt12(->ID), MVM_REPR_ID_MVMCallCapture);
#line 1671 "src/jit/emit_x64.dasc"
        /* else throw */
        //| throw_adhoc "invokewithcapture needs a MVMCallCapture";
        dasm_put(Dst, 1056, (unsigned int)((uintptr_t)("invokewithcapture needs a MVMCallCapture")), (unsigned int)(((uintptr_t)("invokewithcapture needs a MVMCallCapture"))>>32));
        dasm_put(Dst, 206, (MVMuint32)((uintptr_t)(&MVM_exception_throw_adhoc)), (MVMuint32)((uintptr_t)(&MVM_exception_throw_adhoc) >> 32));
#line 1673 "src/jit/emit_x64.dasc"
        //|2:
        dasm_put(Dst, 334);
#line 1674 "src/jit/emit_x64.dasc"
        /* code = MVM_frame_find_invokee(tc, code, NULL) */
        //| mov ARG1, TC;
        //| mov ARG2, WORK[code];
        //| xor ARG3, ARG3;
        //| callp &MVM_frame_find_invokee;
        dasm_put(Dst, 2424, Dt20([code]));
        dasm_put(Dst, 206, (MVMuint32)((uintptr_t)(&MVM_frame_find_invokee)), (MVMuint32)((uintptr_t)(&MVM_frame_find_invokee) >> 32));
        dasm_put(Dst, 212);
#line 1679 "src/jit/emit_x64.dasc"

        //| mov ARG2, RV; // ARG2 = code
        dasm_put(Dst, 2437);
#line 1681 "src/jit/emit_x64.dasc"
        /* tc->cur_frame->return_value = &GET_REG(cur_op, 2) */
        //| lea ARG1, WORK[dest]; // ARG1 is used as scratch space
        //| mov TMP6, aword TC->cur_frame;
        //| mov aword FRAME:TMP6->return_value, ARG1;
        dasm_put(Dst, 2441, Dt20([dest]), Dt1F(->cur_frame), Dt2(->return_value));
#line 1685 "src/jit/emit_x64.dasc"
        /* tc->cur_frame->return_type = MVM_RETURN_OBJ */
        //| mov byte FRAME:TMP6->return_type, MVM_RETURN_OBJ;
        dasm_put(Dst, 2454, Dt2(->return_type), MVM_RETURN_OBJ);
#line 1687 "src/jit/emit_x64.dasc"
        /* tc->cur_frame->return_address = cur_op */
        //| get_cur_op ARG1;
        //| mov aword FRAME:TMP6->return_address, ARG1;
        dasm_put(Dst, 2460, Dt1F(->interp_cur_op), Dt2(->return_address));
#line 1690 "src/jit/emit_x64.dasc"
        /* STABLE(code)->invoke(tc, code, capture->body.apc->effective_callsite,
           capture->body.apc->arg) */
        //| mov ARG1, TC;
        //| mov ARG3, WORK[capture];
        //| mov ARG4, aword CAPTURE:ARG3->body.apc;
        //| mov ARG3, aword ARGCTX:ARG4->callsite;
        //| mov ARG4, aword ARGCTX:ARG4->args;
        //| mov FUNCTION, OBJECT:ARG2->st;
        //| mov FUNCTION, STABLE:FUNCTION->invoke;
        //| call FUNCTION;
        dasm_put(Dst, 2472, Dt20([capture]), Dt5(->body.apc), Dt3(->callsite), Dt3(->args), DtE(->st), Dt11(->invoke));
#line 1700 "src/jit/emit_x64.dasc"
        /* jumping out is handled by invokish */
        break;
    }
    case MVM_OP_captureposelems: {
        MVMint16 dest    = ins->operands[0].reg.orig;
        MVMint16 capture = ins->operands[1].reg.orig;
        //| mov TMP1, aword WORK[capture];
        dasm_put(Dst, 1185, Dt20([capture]));
#line 1707 "src/jit/emit_x64.dasc"
        /* if (IS_CONCRETE(capture) && REPR(capture)->ID == MVM_REPR_ID_MVMCallCapture) */
        //| is_type_object TMP1;
        //| jnz >1;
        //| mov TMP2, OBJECT:TMP1->st;
        //| mov TMP2, STABLE:TMP2->REPR;
        //| cmp dword REPR:TMP2->ID, MVM_REPR_ID_MVMCallCapture;
        //| je >2;
        //|1:
        dasm_put(Dst, 2395, DtE(->header.flags), MVM_CF_TYPE_OBJECT, DtE(->st), Dt11(->REPR), Dt12(->ID), MVM_REPR_ID_MVMCallCapture);
#line 1715 "src/jit/emit_x64.dasc"
        /* else throw */
        //| throw_adhoc "captureposelems needs a concrete MVMCallCapture";
        dasm_put(Dst, 1056, (unsigned int)((uintptr_t)("captureposelems needs a concrete MVMCallCapture")), (unsigned int)(((uintptr_t)("captureposelems needs a concrete MVMCallCapture"))>>32));
        dasm_put(Dst, 206, (MVMuint32)((uintptr_t)(&MVM_exception_throw_adhoc)), (MVMuint32)((uintptr_t)(&MVM_exception_throw_adhoc) >> 32));
#line 1717 "src/jit/emit_x64.dasc"
        //|2:
        //| mov TMP2, aword CAPTURE:TMP1->body.apc;
        //| movzx TMP2, word ARGPROCCONTEXT:TMP2->num_pos;
        //| mov WORK[dest], TMP2;
        dasm_put(Dst, 2505, Dt5(->body.apc), Dt7(->num_pos), Dt20([dest]));
#line 1721 "src/jit/emit_x64.dasc"
        break;
    }
    case MVM_OP_capturehasnameds: {
        MVMint16 dest    = ins->operands[0].reg.orig;
        MVMint16 capture = ins->operands[1].reg.orig;
        //| mov TMP1, aword WORK[capture];
        dasm_put(Dst, 1185, Dt20([capture]));
#line 1727 "src/jit/emit_x64.dasc"
        /* if (IS_CONCRETE(capture) && REPR(capture)->ID == MVM_REPR_ID_MVMCallCapture) */
        //| is_type_object TMP1;
        //| jnz >1;
        //| mov TMP2, OBJECT:TMP1->st;
        //| mov TMP2, STABLE:TMP2->REPR;
        //| cmp dword REPR:TMP2->ID, MVM_REPR_ID_MVMCallCapture;
        //| je >2;
        //|1:
        dasm_put(Dst, 2395, DtE(->header.flags), MVM_CF_TYPE_OBJECT, DtE(->st), Dt11(->REPR), Dt12(->ID), MVM_REPR_ID_MVMCallCapture);
#line 1735 "src/jit/emit_x64.dasc"
        /* else throw */
        //| throw_adhoc "capturehasnameds needs a concrete MVMCallCapture";
        dasm_put(Dst, 1056, (unsigned int)((uintptr_t)("capturehasnameds needs a concrete MVMCallCapture")), (unsigned int)(((uintptr_t)("capturehasnameds needs a concrete MVMCallCapture"))>>32));
        dasm_put(Dst, 206, (MVMuint32)((uintptr_t)(&MVM_exception_throw_adhoc)), (MVMuint32)((uintptr_t)(&MVM_exception_throw_adhoc) >> 32));
#line 1737 "src/jit/emit_x64.dasc"
        //|2:
        //| mov TMP2, CAPTURE:TMP1->body.apc;
        //| mov TMP3w, word ARGPROCCONTEXT:TMP2->num_pos;
        //| mov TMP2w, word ARGPROCCONTEXT:TMP2->arg_count;
        //| cmp TMP2w, TMP3w;
        //| setne al;
        //| movzx rax, al;
        //| mov WORK[dest], rax;
        dasm_put(Dst, 2526, Dt5(->body.apc), Dt7(->num_pos), Dt7(->arg_count), Dt20([dest]));
#line 1745 "src/jit/emit_x64.dasc"
        break;
    }
    case MVM_OP_getstdin:
    case MVM_OP_getstdout:
    case MVM_OP_getstderr: {
        MVMint16 dst = ins->operands[0].reg.orig;
        //| mov TMP3, aword TC->instance;
        dasm_put(Dst, 2562, Dt1F(->instance));
#line 1752 "src/jit/emit_x64.dasc"
        if (ins->info->opcode == MVM_OP_getstdin) {
            //| mov TMP3, aword MVMINSTANCE:TMP3->stdin_handle;
            dasm_put(Dst, 426, DtC(->stdin_handle));
#line 1754 "src/jit/emit_x64.dasc"
        } else if (ins->info->opcode == MVM_OP_getstdout) {
            //| mov TMP3, aword MVMINSTANCE:TMP3->stdout_handle;
            dasm_put(Dst, 426, DtC(->stdout_handle));
#line 1756 "src/jit/emit_x64.dasc"
        } else if (ins->info->opcode == MVM_OP_getstderr) {
            //| mov TMP3, aword MVMINSTANCE:TMP3->stderr_handle;
            dasm_put(Dst, 426, DtC(->stderr_handle));
#line 1758 "src/jit/emit_x64.dasc"
        }
        //| mov aword WORK[dst], TMP3;
        dasm_put(Dst, 556, Dt20([dst]));
#line 1760 "src/jit/emit_x64.dasc"
        break;
    }
    case MVM_OP_ordat:
    case MVM_OP_ordfirst: {
        MVMint16 dst = ins->operands[0].reg.orig;
        MVMint16 str = ins->operands[1].reg.orig;
        //| mov ARG1, TC;
        //| mov ARG2, aword WORK[str];
        dasm_put(Dst, 2023, Dt20([str]));
#line 1768 "src/jit/emit_x64.dasc"
        if (op == MVM_OP_ordat) {
            MVMint16 idx = ins->operands[2].reg.orig;
            //| mov ARG3, qword WORK[idx];
            dasm_put(Dst, 565, Dt20([idx]));
#line 1771 "src/jit/emit_x64.dasc"
        } else {
            //| mov ARG3, 0;
            dasm_put(Dst, 1374);
#line 1773 "src/jit/emit_x64.dasc"
        }
        //| callp &MVM_string_ord_at;
        dasm_put(Dst, 204);
        dasm_put(Dst, 206, (MVMuint32)((uintptr_t)(&MVM_string_ord_at)), (MVMuint32)((uintptr_t)(&MVM_string_ord_at) >> 32));
#line 1775 "src/jit/emit_x64.dasc"
        //| mov qword WORK[dst], RV;
        dasm_put(Dst, 2567, Dt20([dst]));
#line 1776 "src/jit/emit_x64.dasc"
        break;
    }
    case MVM_OP_setcodeobj: {
        MVMint16 obj  = ins->operands[0].reg.orig;
        MVMint16 code = ins->operands[1].reg.orig;
        //| mov TMP1, aword WORK[obj];
        dasm_put(Dst, 1185, Dt20([obj]));
#line 1782 "src/jit/emit_x64.dasc"
        /* if (REPR(obj)->ID == MVM_REPR_ID_MVMCode) */
        //| mov TMP2, OBJECT:TMP1->st;
        //| mov TMP2, STABLE:TMP2->REPR;
        //| cmp dword REPR:TMP2->ID, MVM_REPR_ID_MVMCode;
        //| je >1;
        dasm_put(Dst, 2577, DtE(->st), Dt11(->REPR), Dt12(->ID), MVM_REPR_ID_MVMCode);
#line 1787 "src/jit/emit_x64.dasc"
        /* else throw */
        //| throw_adhoc "setcodeobj needs a code ref";
        dasm_put(Dst, 1056, (unsigned int)((uintptr_t)("setcodeobj needs a code ref")), (unsigned int)(((uintptr_t)("setcodeobj needs a code ref"))>>32));
        dasm_put(Dst, 206, (MVMuint32)((uintptr_t)(&MVM_exception_throw_adhoc)), (MVMuint32)((uintptr_t)(&MVM_exception_throw_adhoc) >> 32));
#line 1789 "src/jit/emit_x64.dasc"
        //|1:
        //| mov TMP2, aword WORK[code];
        //| mov aword CODE:TMP1->body.code_object, TMP2;
        dasm_put(Dst, 2594, Dt20([code]), Dt1A(->body.code_object));
#line 1792 "src/jit/emit_x64.dasc"
        break;
    }
    case MVM_OP_lastexpayload: {
        MVMint16 dst = ins->operands[0].reg.orig;
        //| mov TMP3, aword TC->last_payload;
        //| mov aword WORK[dst], TMP3;
        dasm_put(Dst, 2610, Dt1F(->last_payload), Dt20([dst]));
#line 1798 "src/jit/emit_x64.dasc"
        break;
    }
    case MVM_OP_param_sp: {
        MVMuint16 dst = ins->operands[0].reg.orig;
        MVMuint16 off = ins->operands[1].lit_ui16;
        //| mov ARG1, TC
        //| mov ARG2, TC:ARG1->cur_frame
        //| lea ARG2, FRAME:ARG2->params
        //| mov ARG3, off
        //| callp &MVM_args_slurpy_positional;
        dasm_put(Dst, 2619, Dt1F(->cur_frame), Dt2(->params), off);
        dasm_put(Dst, 206, (MVMuint32)((uintptr_t)(&MVM_args_slurpy_positional)), (MVMuint32)((uintptr_t)(&MVM_args_slurpy_positional) >> 32));
#line 1808 "src/jit/emit_x64.dasc"
        //| mov qword WORK[dst], RV;
        dasm_put(Dst, 2567, Dt20([dst]));
#line 1809 "src/jit/emit_x64.dasc"
        break;
    }
    case MVM_OP_param_sn: {
        MVMuint16 dst = ins->operands[0].reg.orig;
        //| mov ARG1, TC
        //| mov ARG2, TC:ARG1->cur_frame
        //| lea ARG2, FRAME:ARG2->params
        //| callp &MVM_args_slurpy_named;
        dasm_put(Dst, 2637, Dt1F(->cur_frame), Dt2(->params));
        dasm_put(Dst, 206, (MVMuint32)((uintptr_t)(&MVM_args_slurpy_named)), (MVMuint32)((uintptr_t)(&MVM_args_slurpy_named) >> 32));
#line 1817 "src/jit/emit_x64.dasc"
        //| mov qword WORK[dst], RV;
        dasm_put(Dst, 2567, Dt20([dst]));
#line 1818 "src/jit/emit_x64.dasc"
        break;
    }
    case MVM_OP_sp_cas_o: {
        MVMint16 target = ins->operands[1].reg.orig;
        MVMint16 expected = ins->operands[2].reg.orig;
        MVMint16 value = ins->operands[3].reg.orig;
        MVMint16 result = ins->operands[0].reg.orig;
        //| mov ARG1, TC;
        //| mov ARG2, aword WORK[target];
        //| mov ARG3, aword WORK[expected];
        //| mov ARG4, aword WORK[value];
        //|.if WIN32;
        //| lea TMP6, WORK[result]
        //| mov qword [rsp+0x20], TMP6
        //|.else;
        //| lea ARG5, WORK[result]
        //|.endif
        //| mov FUNCTION, OBJECT:ARG2->st;
        //| mov FUNCTION, STABLE:FUNCTION->container_spec;
        //| mov FUNCTION, CONTAINERSPEC:FUNCTION->cas;
        //| call FUNCTION;
        dasm_put(Dst, 2651, Dt20([target]), Dt20([expected]), Dt20([value]), Dt20([result]), DtE(->st), Dt11(->container_spec), Dt15(->cas));
#line 1839 "src/jit/emit_x64.dasc"
        break;
    }
    case MVM_OP_sp_atomicload_o: {
        MVMint16 target = ins->operands[1].reg.orig;
        MVMint16 result = ins->operands[0].reg.orig;
        //| mov ARG1, TC;
        //| mov ARG2, aword WORK[target];
        //| mov FUNCTION, OBJECT:ARG2->st;
        //| mov FUNCTION, STABLE:FUNCTION->container_spec;
        //| mov FUNCTION, CONTAINERSPEC:FUNCTION->atomic_load;
        //| call FUNCTION;
        //| mov WORK[result], RV
        dasm_put(Dst, 2688, Dt20([target]), DtE(->st), Dt11(->container_spec), Dt15(->atomic_load), Dt20([result]));
#line 1851 "src/jit/emit_x64.dasc"
        break;
    }
    case MVM_OP_sp_atomicstore_o: {
        MVMint16 target = ins->operands[0].reg.orig;
        MVMint16 value = ins->operands[1].reg.orig;
        //| mov ARG1, TC;
        //| mov ARG2, aword WORK[target];
        //| mov ARG3, aword WORK[value];
        //| mov FUNCTION, OBJECT:ARG2->st;
        //| mov FUNCTION, STABLE:FUNCTION->container_spec;
        //| mov FUNCTION, CONTAINERSPEC:FUNCTION->atomic_store;
        //| call FUNCTION;
        dasm_put(Dst, 2717, Dt20([target]), Dt20([value]), DtE(->st), Dt11(->container_spec), Dt15(->atomic_store));
#line 1863 "src/jit/emit_x64.dasc"
        break;
    }
    default:
        MVM_panic(1, "Can't JIT opcode <%s>", ins->info->name);
    }
}



/* Call argument decoder */
static void load_call_arg(MVMThreadContext *tc, MVMJitGraph *jg,
                          MVMJitCallArg arg, dasm_State **Dst) {
    switch(arg.type) {
    case MVM_JIT_INTERP_VAR:
        switch (arg.v.ivar) {
        case MVM_JIT_INTERP_TC:
            //| mov TMP6, TC;
            dasm_put(Dst, 2746);
#line 1880 "src/jit/emit_x64.dasc"
            break;
        case MVM_JIT_INTERP_CU:
            //| mov TMP6, CU;
            dasm_put(Dst, 2751);
#line 1883 "src/jit/emit_x64.dasc"
            break;
        case MVM_JIT_INTERP_FRAME:
            //| mov TMP6, TC->cur_frame;
            dasm_put(Dst, 165, Dt1F(->cur_frame));
#line 1886 "src/jit/emit_x64.dasc"
            break;
        case MVM_JIT_INTERP_PARAMS:
            //| mov TMP6, TC->cur_frame;
            //| lea TMP6, FRAME:TMP6->params;
            dasm_put(Dst, 2756, Dt1F(->cur_frame), Dt2(->params));
#line 1890 "src/jit/emit_x64.dasc"
            break;
        case MVM_JIT_INTERP_CALLER:
            //| mov TMP6, TC->cur_frame;
            //| mov TMP6, aword FRAME:TMP6->caller;
            dasm_put(Dst, 2765, Dt1F(->cur_frame), Dt2(->caller));
#line 1894 "src/jit/emit_x64.dasc"
            break;
        }
        break;
    case MVM_JIT_REG_VAL:
        //| mov TMP6, qword WORK[arg.v.reg];
        dasm_put(Dst, 2774, Dt20([arg.v.reg]));
#line 1899 "src/jit/emit_x64.dasc"
        break;
    case MVM_JIT_REG_VAL_F:
        //| mov TMP6, qword WORK[arg.v.reg];
        dasm_put(Dst, 2774, Dt20([arg.v.reg]));
#line 1902 "src/jit/emit_x64.dasc"
        break;
    case MVM_JIT_REG_ADDR:
        //| lea TMP6, WORK[arg.v.reg];
        dasm_put(Dst, 2779, Dt20([arg.v.reg]));
#line 1905 "src/jit/emit_x64.dasc"
        break;
    case MVM_JIT_STR_IDX:
        //| get_string TMP6, arg.v.lit_i64;
         MVM_cu_ensure_string_decoded(tc, jg->sg->sf->body.cu, arg.v.lit_i64);
        dasm_put(Dst, 2784, Dt21(->body.strings), Dt13([arg.v.lit_i64]));
#line 1908 "src/jit/emit_x64.dasc"
        break;
    case MVM_JIT_LITERAL:
        //| mov TMP6, arg.v.lit_i64;
        dasm_put(Dst, 2793, arg.v.lit_i64);
#line 1911 "src/jit/emit_x64.dasc"
        break;
    case MVM_JIT_LITERAL_64:
    case MVM_JIT_LITERAL_PTR:
    case MVM_JIT_LITERAL_F:
        //| mov64 TMP6, arg.v.lit_i64;
        dasm_put(Dst, 2798, (unsigned int)(arg.v.lit_i64), (unsigned int)((arg.v.lit_i64)>>32));
#line 1916 "src/jit/emit_x64.dasc"
        break;
    case MVM_JIT_REG_STABLE:
        //| mov TMP6, qword WORK[arg.v.reg];
        //| mov TMP6, OBJECT:TMP6->st;
        dasm_put(Dst, 229, Dt20([arg.v.reg]), DtE(->st));
#line 1920 "src/jit/emit_x64.dasc"
        break;
    case MVM_JIT_REG_OBJBODY:
        //| mov TMP6, qword WORK[arg.v.reg];
        //| lea TMP6, STOOGE:TMP6->data;
        dasm_put(Dst, 2803, Dt20([arg.v.reg]), DtF(->data));
#line 1924 "src/jit/emit_x64.dasc"
        break;
    case MVM_JIT_DATA_LABEL:
        //| lea TMP6, [=>(arg.v.lit_i64)];
        dasm_put(Dst, 2812, (arg.v.lit_i64));
#line 1927 "src/jit/emit_x64.dasc"
        break;
    }
}

static void emit_gpr_arg(MVMThreadContext *tc, MVMJitGraph *jg,
                         MVMint32 i, dasm_State **Dst) {
    switch (i) {
    case 0:
        //| mov ARG1, TMP6;
        dasm_put(Dst, 2817);
#line 1936 "src/jit/emit_x64.dasc"
        break;
    case 1:
        //| mov ARG2, TMP6;
        dasm_put(Dst, 2821);
#line 1939 "src/jit/emit_x64.dasc"
        break;
    case 2:
        //| mov ARG3, TMP6;
        dasm_put(Dst, 2825);
#line 1942 "src/jit/emit_x64.dasc"
        break;
    case 3:
        //| mov ARG4, TMP6;
        dasm_put(Dst, 2829);
#line 1945 "src/jit/emit_x64.dasc"
        break;
//|.if POSIX
    case 4:
//|        mov ARG5, TMP6;
dasm_put(Dst, 2833);
       break;
#line 1950 "src/jit/emit_x64.dasc"
  case 5:
//|      mov ARG6, TMP6;
dasm_put(Dst, 2837);
     break;
#line 1953 "src/jit/emit_x64.dasc"
//|.endif
    default:
        MVM_oops(tc, "JIT: can't store %d arguments in GPR", i);
    }
}

static void emit_sse_arg(MVMThreadContext *tc, MVMJitGraph *jg,
                         MVMint32 i, dasm_State **Dst) {
    switch (i) {
    case 0:
        //| movd ARG1F, TMP6;
        dasm_put(Dst, 2841);
#line 1964 "src/jit/emit_x64.dasc"
        break;
    case 1:
        //| movd ARG2F, TMP6;
        dasm_put(Dst, 2847);
#line 1967 "src/jit/emit_x64.dasc"
        break;
    case 2:
        //| movd ARG3F, TMP6;
        dasm_put(Dst, 2853);
#line 1970 "src/jit/emit_x64.dasc"
        break;
    case 3:
        //| movd ARG4F, TMP6;
        dasm_put(Dst, 2859);
#line 1973 "src/jit/emit_x64.dasc"
        break;
//|.if POSIX
    case 4:
//|        movd ARG5F, TMP6;
dasm_put(Dst, 2865);
       break;
#line 1978 "src/jit/emit_x64.dasc"
    case 5:
//|         movd ARG6F, TMP6;
dasm_put(Dst, 2871);
        break;
#line 1981 "src/jit/emit_x64.dasc"
    case 6:
//|        movd ARG7F, TMP6;
dasm_put(Dst, 2878);
       break;
#line 1984 "src/jit/emit_x64.dasc"
    case 7:
//|        movd ARG8F, TMP6;
dasm_put(Dst, 2885);
       break;
#line 1987 "src/jit/emit_x64.dasc"
//|.endif
    default:
        MVM_oops(tc, "JIT: can't put  %d arguments in SSE", i);
    }
}

static void emit_stack_arg(MVMThreadContext *tc, MVMJitGraph *jg,
                           MVMint32 arg_size, MVMint32 pos,
                           dasm_State **Dst) {
    /* basically, stack arguments are passed in right-to-left order
       on both POSIX and W64 backends, it seems. Thus the most logical
       thing to do is to count from the stack top upwards. */
    if (pos + arg_size > 160) {
        MVM_oops(tc, "JIT: trying to pass arguments "
                 " in local space (stack top offset:"
                 " %d, size: %d)", pos, arg_size);
    }
    switch(arg_size) {
    case 1:
        //| mov byte [rsp+pos], TMP6b;
        dasm_put(Dst, 2892, pos);
#line 2007 "src/jit/emit_x64.dasc"
        break;
    case 2:
        //| mov word [rsp+pos], TMP6w;
        dasm_put(Dst, 2899, pos);
#line 2010 "src/jit/emit_x64.dasc"
        break;
    case 4:
        //| mov dword [rsp+pos], TMP6d;
        dasm_put(Dst, 2900, pos);
#line 2013 "src/jit/emit_x64.dasc"
        break;
    case 8:
        //| mov qword [rsp+pos], TMP6;
        dasm_put(Dst, 2907, pos);
#line 2016 "src/jit/emit_x64.dasc"
        break;
    default:
        MVM_oops(tc, "JIT: can't pass arguments size %d bytes",
                 arg_size);
    }
}

static void emit_posix_callargs(MVMThreadContext *tc, MVMJitGraph *jg,
                                MVMJitCallArg args[], MVMint32 num_args,
                                dasm_State **Dst) {
    MVMint32 num_gpr = 0, num_fpr = 0, num_stack = 0, i;
    MVMJitCallArg in_gpr[6], in_fpr[8], *on_stack = NULL;
    if (num_args > 6)
        on_stack = MVM_malloc(sizeof(MVMJitCallArg) * (num_args - 6));
    /* divide in gpr, fpr, stack values */
    for (i = 0; i < num_args; i++) {
        switch (args[i].type) {
        case MVM_JIT_INTERP_VAR:
        case MVM_JIT_REG_VAL:
        case MVM_JIT_REG_ADDR:
        case MVM_JIT_REG_OBJBODY:
        case MVM_JIT_REG_STABLE:
        case MVM_JIT_STR_IDX:
        case MVM_JIT_LITERAL:
        case MVM_JIT_LITERAL_64:
        case MVM_JIT_LITERAL_PTR:
        case MVM_JIT_DATA_LABEL:
            if (num_gpr < 6) {
                in_gpr[num_gpr++] = args[i];
            } else {
                on_stack[num_stack++] = args[i];
            }
            break;
        case MVM_JIT_REG_VAL_F:
        case MVM_JIT_LITERAL_F:
            if (num_fpr < 8) {
                in_fpr[num_fpr++] = args[i];
            } else {
                on_stack[num_stack++] = args[i];
            }
            break;
        }
    }
    for (i = 0; i < num_gpr; i++) {
        load_call_arg(tc, jg, in_gpr[i], Dst);
        emit_gpr_arg(tc, jg, i, Dst);
    }
    for (i = 0; i < num_fpr; i++) {
        load_call_arg(tc, jg, in_fpr[i], Dst);
        emit_sse_arg(tc, jg, i, Dst);
    }
    /* push right-to-left */
    for (i = 0; i < num_stack; i++) {
        load_call_arg(tc, jg, on_stack[i], Dst);
        // I'm not sure this is correct, btw
        emit_stack_arg(tc, jg, 8, i*8, Dst);
    }
    if (on_stack)
        MVM_free(on_stack);
}

static void emit_win64_callargs(MVMThreadContext *tc, MVMJitGraph *jg,
                                MVMJitCallArg args[], MVMint32 num_args,
                                dasm_State **Dst) {
    MVMint32 i;
    MVMint32 num_reg_args = (num_args > 4 ? 4 : num_args);
    for (i = 0; i < num_reg_args; i++) {
        load_call_arg(tc, jg, args[i], Dst);
        if (args[i].type == MVM_JIT_REG_VAL_F ||
            args[i].type == MVM_JIT_LITERAL_F) {
            emit_sse_arg(tc, jg, i, Dst);
        } else {
            emit_gpr_arg(tc, jg, i, Dst);
        }
    }
    for (; i < num_args; i++) {
        load_call_arg(tc, jg, args[i], Dst);
        emit_stack_arg(tc, jg, 8, i * 8, Dst);
    }
}

void MVM_jit_emit_call_c(MVMThreadContext *tc, MVMJitGraph *jg,
                         MVMJitCallC * call_spec, dasm_State **Dst) {

    MVM_jit_log(tc, "emit c call <%d args>\n", call_spec->num_args);
    if (call_spec->has_vargs) {
        MVM_oops(tc, "JIT can't handle varargs yet");
    }
    //|.if WIN32;
#line 2106 "src/jit/emit_x64.dasc"
    //|.else;
     emit_posix_callargs(tc, jg, call_spec->args, call_spec->num_args, Dst);
    //|.endif
    /* Emit the call. I think we should be able to do something smarter than
     * store the constant into the bytecode, like a data segment. But I'm
     * not sure. */
    //| callp call_spec->func_ptr;
    dasm_put(Dst, 204);
    dasm_put(Dst, 206, (MVMuint32)((uintptr_t)(call_spec->func_ptr)), (MVMuint32)((uintptr_t)(call_spec->func_ptr) >> 32));
    dasm_put(Dst, 212);
#line 2113 "src/jit/emit_x64.dasc"
    /* right, now determine what to do with the return value */
    switch(call_spec->rv_mode) {
    case MVM_JIT_RV_VOID:
        break;
    case MVM_JIT_RV_INT:
    case MVM_JIT_RV_PTR:
        //| mov WORK[call_spec->rv_idx], RV;
        dasm_put(Dst, 274, Dt20([call_spec->rv_idx]));
#line 2120 "src/jit/emit_x64.dasc"
        break;
    case MVM_JIT_RV_NUM:
        //| movsd qword WORK[call_spec->rv_idx], RVF;
        dasm_put(Dst, 1232, Dt20([call_spec->rv_idx]));
#line 2123 "src/jit/emit_x64.dasc"
        break;
    case MVM_JIT_RV_DEREF:
        //| mov TMP1, [RV];
        //| mov WORK[call_spec->rv_idx], TMP1;
        dasm_put(Dst, 2914, Dt20([call_spec->rv_idx]));
#line 2127 "src/jit/emit_x64.dasc"
        break;
    case MVM_JIT_RV_ADDR:
        /* store local at address */
        //| mov TMP1, WORK[call_spec->rv_idx];
        //| mov [RV], TMP1;
        dasm_put(Dst, 2922, Dt20([call_spec->rv_idx]));
#line 2132 "src/jit/emit_x64.dasc"
        break;
    }
}

void MVM_jit_emit_branch(MVMThreadContext *tc, MVMJitGraph *jg,
                         MVMJitBranch * branch, dasm_State **Dst) {
    MVMSpeshIns *ins = branch->ins;
    MVMint32 name = branch->dest;
    /* move gc sync point to the front so as to not have
     * awkward dispatching issues */
    //| gc_sync_point;
    dasm_put(Dst, 2930, Dt1F(->gc_status));
    dasm_put(Dst, 206, (MVMuint32)((uintptr_t)(&MVM_gc_enter_from_interrupt)), (MVMuint32)((uintptr_t)(&MVM_gc_enter_from_interrupt) >> 32));
    dasm_put(Dst, 1066);
#line 2143 "src/jit/emit_x64.dasc"
    if (ins == NULL || ins->info->opcode == MVM_OP_goto) {
        MVM_jit_log(tc, "emit jump to label %d\n", name);
        if (name == MVM_JIT_BRANCH_EXIT) {
            //| jmp ->exit
            dasm_put(Dst, 2945);
#line 2147 "src/jit/emit_x64.dasc"
        } else {
            //| jmp =>(name)
            dasm_put(Dst, 2950, (name));
#line 2149 "src/jit/emit_x64.dasc"
        }
    } else {
        MVMint16 val = ins->operands[0].reg.orig;
        MVM_jit_log(tc, "emit branch <%s> to label %d\n",
                    ins->info->name, name);
        switch(ins->info->opcode) {
        case MVM_OP_if_i:
            //| mov rax, WORK[val];
            //| test rax, rax;
            //| jnz =>(name); // jump to dynamic label
            dasm_put(Dst, 2954, Dt20([val]), (name));
#line 2159 "src/jit/emit_x64.dasc"
            break;
        case MVM_OP_unless_i:
            //| mov rax, WORK[val];
            //| test rax, rax;
            //| jz =>(name);
            dasm_put(Dst, 2965, Dt20([val]), (name));
#line 2164 "src/jit/emit_x64.dasc"
            break;
        case MVM_OP_if_n:
            //| movd xmm0, qword WORK[val];
            //| xorpd xmm1, xmm1; // make it zero
            //| ucomisd xmm0, xmm1;
            //| jp =>(name);  // is NaN?
            //| jne =>(name); // not equal to zero? we're golden
            dasm_put(Dst, 2976, Dt20([val]), (name), (name));
#line 2171 "src/jit/emit_x64.dasc"
            break;
        case MVM_OP_unless_n:
            //| movd xmm0, qword WORK[val];
            //| xorpd xmm1, xmm1; // make it zero
            //| ucomisd xmm0, xmm1;
            //| jp >1; // is NaN
            //| jne >1; // is not zero
            //| jmp =>(name); // it is zero yay!
            //|1:
            dasm_put(Dst, 2997, Dt20([val]), (name));
#line 2180 "src/jit/emit_x64.dasc"
            break;
        case MVM_OP_if_s0:
        case MVM_OP_unless_s0:
            //| mov ARG1, TC;
            //| mov ARG2, WORK[val];
            //| callp &MVM_coerce_istrue_s;
            dasm_put(Dst, 3025, Dt20([val]));
            dasm_put(Dst, 206, (MVMuint32)((uintptr_t)(&MVM_coerce_istrue_s)), (MVMuint32)((uintptr_t)(&MVM_coerce_istrue_s) >> 32));
#line 2186 "src/jit/emit_x64.dasc"
            //| test RV, RV;
            dasm_put(Dst, 2053);
#line 2187 "src/jit/emit_x64.dasc"
            if (ins->info->opcode == MVM_OP_unless_s0)
                //| jz =>(name);
                dasm_put(Dst, 2972, (name));
#line 2189 "src/jit/emit_x64.dasc"
            else
                //| jnz =>(name);
                dasm_put(Dst, 2961, (name));
#line 2191 "src/jit/emit_x64.dasc"
            break;
        case MVM_OP_ifnonnull:
            //| mov TMP1, WORK[val];
            //| test TMP1, TMP1;
            //| jz >1;
            //| get_vmnull TMP2;
            //| cmp TMP1, TMP2;
            //| je >1;
            //| jmp =>(name);
            //|1:
            dasm_put(Dst, 3035, Dt20([val]), Dt1F(->instance), DtC(->VMNull), (name));
#line 2201 "src/jit/emit_x64.dasc"
            break;
        case MVM_OP_indexat:
        case MVM_OP_indexnat: {
            MVMint16 offset = ins->operands[1].reg.orig;
            MVMuint32 str_idx = ins->operands[2].lit_str_idx;
            //| mov ARG1, TC;
            //| mov ARG2, WORK[val];
            //| mov ARG3, WORK[offset];
            //| get_string ARG4, str_idx;
            dasm_put(Dst, 3067, Dt20([val]), Dt20([offset]));
             MVM_cu_ensure_string_decoded(tc, jg->sg->sf->body.cu, str_idx);
#line 2210 "src/jit/emit_x64.dasc"
            //| callp &MVM_string_char_at_in_string;
            dasm_put(Dst, 3080, Dt21(->body.strings), Dt13([str_idx]));
            dasm_put(Dst, 206, (MVMuint32)((uintptr_t)(&MVM_string_char_at_in_string)), (MVMuint32)((uintptr_t)(&MVM_string_char_at_in_string) >> 32));
            dasm_put(Dst, 212);
#line 2211 "src/jit/emit_x64.dasc"
            /* This subtlety is due to the value being overloaded to
             * -2 if it is out of bounds. Note that -1 is passed as a
             * 32 bit integer, but this magically works in a 64 bit
             * comparison because 32 bit values are sign-extended */
            //| cmp RV, -1;
            dasm_put(Dst, 3090);
#line 2216 "src/jit/emit_x64.dasc"
            if (ins->info->opcode == MVM_OP_indexat)
                //| jle =>(name);
                dasm_put(Dst, 3097, (name));
#line 2218 "src/jit/emit_x64.dasc"
            else {

                //| jne =>(name);
                dasm_put(Dst, 2961, (name));
#line 2221 "src/jit/emit_x64.dasc"
            }
            break;
        }
        default:
            MVM_panic(1, "JIT: Can't handle conditional <%s>", ins->info->name);
        }
    }
}

void MVM_jit_emit_label(MVMThreadContext *tc, MVMJitGraph *jg,
                        MVMJitLabel *label, dasm_State **Dst) {
    //| =>(label->name):
    dasm_put(Dst, 393, (label->name));
#line 2233 "src/jit/emit_x64.dasc"
}

void MVM_jit_emit_guard(MVMThreadContext *tc, MVMJitGraph *jg,
                        MVMJitGuard *guard, dasm_State **Dst) {
    MVMint16 op        = guard->ins->info->opcode;
    MVMint16 obj       = guard->ins->operands[0].reg.orig;
    MVMint16 spesh_idx = guard->ins->operands[1].lit_i16;
    MVM_jit_log(tc, "emit guard <%s>\n", guard->ins->info->name);
    /* load object and spesh slot value */
    //| mov TMP1, WORK[obj];
    //| get_spesh_slot TMP2, spesh_idx;
    dasm_put(Dst, 3101, Dt20([obj]), Dt1F(->cur_frame), Dt2(->effective_spesh_slots), Dt14([spesh_idx]));
#line 2244 "src/jit/emit_x64.dasc"
    if (op == MVM_OP_sp_guard) {
        /* object in question should just match the type, so it shouldn't
         * be zero, and the STABLE should be equal to the value in the spesh
         * slot */
        /* check for null */
        //| test TMP1, TMP1;
        //| jz >1;
        dasm_put(Dst, 3118);
#line 2251 "src/jit/emit_x64.dasc"
        /* get stable and compare */
        //| cmp TMP2, OBJECT:TMP1->st;
        //| jne >1;
        dasm_put(Dst, 3126, DtE(->st));
#line 2254 "src/jit/emit_x64.dasc"
        /* we're good, no need to deopt */
    } else if (op == MVM_OP_sp_guardtype) {
        /* object in question should be a type object, so it shouldn't
         * be zero, should not be concrete, and the STABLE should be
         * equal to the value in the spesh slot */
        /* check for null */
        //| test TMP1, TMP1;
        //| jz >1;
        dasm_put(Dst, 3118);
#line 2262 "src/jit/emit_x64.dasc"
        /* check if type object (not concrete) */
        //| is_type_object TMP1;
        dasm_put(Dst, 3135, DtE(->header.flags), MVM_CF_TYPE_OBJECT);
#line 2264 "src/jit/emit_x64.dasc"
        /* if zero, this is a concrete object, and we should deopt */
        //| jz >1;
        dasm_put(Dst, 2589);
#line 2266 "src/jit/emit_x64.dasc"
        /* get stable and compare */
        //| cmp TMP2, OBJECT:TMP1->st;
        //| jne >1;
        dasm_put(Dst, 3126, DtE(->st));
#line 2269 "src/jit/emit_x64.dasc"
        /* we're good, no need to deopt */
    } else if (op == MVM_OP_sp_guardconc) {
        /* object should be a non-null concrete (non-type) object */
        //| test TMP1, TMP1;
        //| jz >1;
        dasm_put(Dst, 3118);
#line 2274 "src/jit/emit_x64.dasc"
        /* shouldn't be type object */
        //| is_type_object TMP1;
        //| jnz >1;
        dasm_put(Dst, 3142, DtE(->header.flags), MVM_CF_TYPE_OBJECT);
#line 2277 "src/jit/emit_x64.dasc"
        /* should have our stable */
        //| cmp TMP2, OBJECT:TMP1->st;
        //| jne >1;
        dasm_put(Dst, 3126, DtE(->st));
#line 2280 "src/jit/emit_x64.dasc"
    } else if (op == MVM_OP_sp_guardsf) {
        /* Should be an MVMCode */
        MVMint32 reprid = MVM_REPR_ID_MVMCode;
        //| mov TMP3, OBJECT:TMP1->st;
        //| mov TMP3, STABLE:TMP3->REPR;
        //| cmp qword REPR:TMP3->ID, reprid;
        //| jne >1;
        //| cmp TMP2, CODE:TMP1->body.sf;
        //| jne >1;
        dasm_put(Dst, 3153, DtE(->st), Dt11(->REPR), Dt12(->ID), reprid, Dt1A(->body.sf));
#line 2289 "src/jit/emit_x64.dasc"
    }
    /* if we're here, we didn't jump to deopt, so skip it */
    //| jmp >2;
    //|1:
    dasm_put(Dst, 1909);
#line 2293 "src/jit/emit_x64.dasc"
    /* emit deopt */
    //| mov ARG1, TC;
    //| mov ARG2, guard->deopt_offset;
    //| mov ARG3, guard->deopt_target;
    //| callp &MVM_spesh_deopt_one_direct;
    dasm_put(Dst, 3179, guard->deopt_offset, guard->deopt_target);
    dasm_put(Dst, 206, (MVMuint32)((uintptr_t)(&MVM_spesh_deopt_one_direct)), (MVMuint32)((uintptr_t)(&MVM_spesh_deopt_one_direct) >> 32));
    dasm_put(Dst, 212);
#line 2298 "src/jit/emit_x64.dasc"
    /* tell jit driver we're deopting */
    //| mov RV, MVM_JIT_CTRL_DEOPT
    //| jmp ->out;
    //|2:
    dasm_put(Dst, 3193, MVM_JIT_CTRL_DEOPT);
#line 2302 "src/jit/emit_x64.dasc"
}

void MVM_jit_emit_invoke(MVMThreadContext *tc, MVMJitGraph *jg, MVMJitInvoke *invoke,
                         dasm_State **Dst) {
    MVMint16 i;
    MVMuint16 callsite_idx = invoke->callsite_idx;
    MVM_jit_log(tc, "Emit invoke (%d args)\n", invoke->arg_count);
    /* Store callsite in tmp6, which we use at the end of invoke */
    //| mov TMP6, CU->body.callsites;
    //| mov TMP6, CALLSITEPTR:TMP6[callsite_idx];
    dasm_put(Dst, 2784, Dt21(->body.callsites), Dt4([callsite_idx]));
#line 2312 "src/jit/emit_x64.dasc"

    /* Store callsite in the frame. I use TMP5 as it never conflicts
     * with argument passing (like TMP6, but unlike other TMP regs) */
    //| mov TMP5, TC->cur_frame;
    //| mov FRAME:TMP5->cur_args_callsite, TMP6;
    dasm_put(Dst, 3204, Dt1F(->cur_frame), Dt2(->cur_args_callsite));
#line 2317 "src/jit/emit_x64.dasc"

    /* Setup the frame for returning to our current position */
    if (sizeof(MVMReturnType) == 1) {
        //| mov byte FRAME:TMP5->return_type, invoke->return_type;
        dasm_put(Dst, 3213, Dt2(->return_type), invoke->return_type);
#line 2321 "src/jit/emit_x64.dasc"
    } else {
        MVM_panic(1, "JIT: MVMReturnType has unexpected size");
    }
    /* The register for our return value */
    if (invoke->return_type == MVM_RETURN_VOID) {
        //| mov aword FRAME:TMP5->return_value, NULL;
        dasm_put(Dst, 3219, Dt2(->return_value), NULL);
#line 2327 "src/jit/emit_x64.dasc"
    } else {
        //| lea TMP2, WORK[invoke->return_register];
        //| mov aword FRAME:TMP5->return_value, TMP2;
        dasm_put(Dst, 3225, Dt20([invoke->return_register]), Dt2(->return_value));
#line 2330 "src/jit/emit_x64.dasc"
    }
    /* The return address for the interpreter */
    //| get_cur_op TMP2;
    //| mov aword FRAME:TMP5->return_address, TMP2;
    dasm_put(Dst, 3234, Dt1F(->interp_cur_op), Dt2(->return_address));
#line 2334 "src/jit/emit_x64.dasc"

    /* The re-entry label for the JIT, so that we continue in the next BB */
    //| lea TMP2, [=>(invoke->reentry_label)];
    //| mov aword FRAME:TMP5->jit_entry_label, TMP2;
    dasm_put(Dst, 3246, (invoke->reentry_label), Dt2(->jit_entry_label));
#line 2338 "src/jit/emit_x64.dasc"

    /* Install invoke args */
    //| mov TMP5, FRAME:TMP5->args;
    dasm_put(Dst, 180, Dt2(->args));
#line 2341 "src/jit/emit_x64.dasc"
    for (i = 0;  i < invoke->arg_count; i++) {
        MVMSpeshIns *ins = invoke->arg_ins[i];
        switch (ins->info->opcode) {
        case MVM_OP_arg_i:
        case MVM_OP_arg_s:
        case MVM_OP_arg_n:
        case MVM_OP_arg_o: {
            MVMint16 dst = ins->operands[0].lit_i16;
            MVMint16 src = ins->operands[1].reg.orig;
            //| mov TMP4, WORK[src];
            //| mov REGISTER:TMP5[dst], TMP4;
            dasm_put(Dst, 3255, Dt20([src]), Dt1([dst]));
#line 2352 "src/jit/emit_x64.dasc"
            break;
        }
        case MVM_OP_argconst_n:
        case MVM_OP_argconst_i: {
            MVMint16 dst = ins->operands[0].lit_i16;
            MVMint64 val = ins->operands[1].lit_i64;
            //| mov64 TMP4, val;
            //| mov REGISTER:TMP5[dst], TMP4;
            dasm_put(Dst, 3264, (unsigned int)(val), (unsigned int)((val)>>32), Dt1([dst]));
#line 2360 "src/jit/emit_x64.dasc"
            break;
        }
        case MVM_OP_argconst_s: {
            MVMint16 dst = ins->operands[0].lit_i16;
            MVMint32 idx = ins->operands[1].lit_str_idx;
            //| get_string TMP4, idx;
             MVM_cu_ensure_string_decoded(tc, jg->sg->sf->body.cu, idx);
#line 2366 "src/jit/emit_x64.dasc"
            //| mov REGISTER:TMP5[dst], TMP4;
            dasm_put(Dst, 3273, Dt21(->body.strings), Dt13([idx]), Dt1([dst]));
#line 2367 "src/jit/emit_x64.dasc"
            break;
        }
        default:
            MVM_panic(1, "JIT invoke: Can't add arg <%s>",
                      ins->info->name);
        }
    }

    /* if we're not fast, then we should get the code from multi resolution */
    if (!invoke->is_fast) {
        /* first, save callsite and args */
        //| mov qword [rbp-0x28], TMP5; // args
        //| mov qword [rbp-0x30], TMP6; // callsite
        dasm_put(Dst, 3286);
#line 2380 "src/jit/emit_x64.dasc"
        /* setup call MVM_frame_multi_ok(tc, code, &cur_callsite, args); */
        //| mov ARG1, TC;
        //| mov ARG2, WORK[invoke->code_register]; // code object
        //| lea ARG3, [rbp-0x30];                  // &cur_callsite
        //| mov ARG4, TMP5;                        // args
        //|.if WIN32;
        //| mov qword [rsp+0x20], 0
        //|.else;
        //| mov ARG5, 0;                           // NULL to &was_multi
        //|.endif
        //| callp &MVM_frame_find_invokee_multi_ok;
        dasm_put(Dst, 3295, Dt20([invoke->code_register]));
        dasm_put(Dst, 206, (MVMuint32)((uintptr_t)(&MVM_frame_find_invokee_multi_ok)), (MVMuint32)((uintptr_t)(&MVM_frame_find_invokee_multi_ok) >> 32));
        dasm_put(Dst, 212);
#line 2391 "src/jit/emit_x64.dasc"
        /* restore callsite, args, RV now holds code object */
        //| mov TMP6, [rbp-0x30]; // callsite
        //| mov TMP5, [rbp-0x28]; // args
        dasm_put(Dst, 3319);
#line 2394 "src/jit/emit_x64.dasc"
        /* setup args for call to invoke(tc, code, cur_callsite, args) */
        //| mov ARG1, TC;
        //| mov ARG2, RV;   // code object
        //| mov ARG3, TMP6; // callsite
        //| mov ARG4, TMP5; // args
        dasm_put(Dst, 3328);
#line 2399 "src/jit/emit_x64.dasc"
        /* get the actual function */
        //| mov FUNCTION, OBJECT:RV->st;
        //| mov FUNCTION, STABLE:FUNCTION->invoke;
        //| call FUNCTION;
        dasm_put(Dst, 3342, DtE(->st), Dt11(->invoke));
#line 2403 "src/jit/emit_x64.dasc"
    } else {
        /* call MVM_frame_invoke_code */
        //| mov ARG1, TC;
        //| mov ARG2, WORK[invoke->code_register];
        //| mov ARG3, TMP6; // this is the callsite object
        //| mov ARG4, invoke->spesh_cand;
        //| callp &MVM_frame_invoke_code;
        dasm_put(Dst, 3355, Dt20([invoke->code_register]), invoke->spesh_cand);
        dasm_put(Dst, 206, (MVMuint32)((uintptr_t)(&MVM_frame_invoke_code)), (MVMuint32)((uintptr_t)(&MVM_frame_invoke_code) >> 32));
        dasm_put(Dst, 212);
#line 2410 "src/jit/emit_x64.dasc"
    }
    /* Almost done. jump out into the interprete */
    //| mov RV, 1;
    //| jmp ->out;
    dasm_put(Dst, 3372);
#line 2414 "src/jit/emit_x64.dasc"
}

void MVM_jit_emit_jumplist(MVMThreadContext *tc, MVMJitGraph *jg,
                           MVMJitJumpList *jumplist, dasm_State **Dst) {
    MVMint32 i;
    MVM_jit_log(tc, "Emit jumplist (%"PRId64" labels)\n", jumplist->num_labels);
    //| mov TMP1, WORK[jumplist->reg];
    //| cmp TMP1, 0;
    //| jl >2;
    //| cmp TMP1, jumplist->num_labels;
    //| jge >2;
    //| imul TMP1, 0x8; // 8 bytes per goto
    //| lea TMP2, [>1];
    //| add TMP2, TMP1;
    //| jmp TMP2;
    //|.align 8;
    //|1:
    dasm_put(Dst, 3384, Dt20([jumplist->reg]), jumplist->num_labels);
#line 2431 "src/jit/emit_x64.dasc"
    for (i = 0; i < jumplist->num_labels; i++) {
        //|=>(jumplist->in_labels[i]):
        //| jmp =>(jumplist->out_labels[i]);
        //|.align 8;
        dasm_put(Dst, 3426, (jumplist->in_labels[i]), (jumplist->out_labels[i]));
#line 2435 "src/jit/emit_x64.dasc"
    }
    //|2:
    dasm_put(Dst, 339);
#line 2437 "src/jit/emit_x64.dasc"
}

void MVM_jit_emit_control(MVMThreadContext *tc, MVMJitGraph *jg,
                          MVMJitControl *ctrl, dasm_State **Dst) {
    /* TODO - rename invokish and pre and post invokish into something that makes more sense */
    if (ctrl->type == MVM_JIT_CONTROL_INVOKISH) {
        MVM_jit_log(tc, "Emit invokish control guard\n");
        /* This relies on the fact that MVM_JIT_THROWISH_PRE has already
         * assigned the jit entry label */
        //| mov eax, dword TC->current_frame_nr;
        //| cmp eax, FRAME_NR;
        //| je >9;
        //| mov RV, 1;
        //| jmp ->out;
        //|9:
        dasm_put(Dst, 3433, Dt1F(->current_frame_nr));
#line 2452 "src/jit/emit_x64.dasc"
    }
    else if (ctrl->type == MVM_JIT_CONTROL_DYNAMIC_LABEL) {
        MVM_jit_log(tc, "Emit throwish control guard\n");
        /* This pre-loads a label for the next op, so that throwish
         * operators will know where we're throwing from - NB, I'm not
         * totally sure this is still necessary now */
        //| lea TMP1, [>1];
        //| mov TMP2, TC->cur_frame;
        //| mov aword FRAME:TMP2->jit_entry_label, TMP1;
        //|1:
        dasm_put(Dst, 3458, Dt1F(->cur_frame), Dt2(->jit_entry_label));
#line 2462 "src/jit/emit_x64.dasc"
    }
    else if (ctrl->type == MVM_JIT_CONTROL_THROWISH_PRE) {
        /* Store a reference to the 9 label below. I assume this label isn't
         * used in the intermediate instructions, which is basically valid
         * throughout this codebase. */
        //| lea TMP1, [>9];
        //| mov TMP2, TC->cur_frame;
        //| mov aword FRAME:TMP2->jit_entry_label, TMP1;
        dasm_put(Dst, 3474, Dt1F(->cur_frame), Dt2(->jit_entry_label));
#line 2470 "src/jit/emit_x64.dasc"
    }
    else if (ctrl->type == MVM_JIT_CONTROL_THROWISH_POST) {
        /* check if our current frame is the same as it was */
        //| mov TMP1d, dword TC->current_frame_nr;
        //| cmp TMP1d, FRAME_NR;
        //| jne >8;
        dasm_put(Dst, 3488, Dt1F(->current_frame_nr));
#line 2476 "src/jit/emit_x64.dasc"
        /* if it is, we may still be in a goto-handler, so in that
         * case the throwing machinery should have ensured that
         * jit_entry_label now points to the correct label. If not, it
         * still points to 9:. */
        //| mov TMP1, TC->cur_frame;
        //| jmp aword FRAME:TMP1->jit_entry_label;
        dasm_put(Dst, 3500, Dt1F(->cur_frame), Dt2(->jit_entry_label));
#line 2482 "src/jit/emit_x64.dasc"
        /* if not the same frame, trampoline to interpreter */
        //|8:
        //| mov RV, 1;
        //| jmp ->out;
        dasm_put(Dst, 3509);
#line 2486 "src/jit/emit_x64.dasc"
        /* I assume we *never* use a local label 9 in the code between
         * pre-and-post throwish */
        //|9:
        dasm_put(Dst, 3455);
#line 2489 "src/jit/emit_x64.dasc"
    } else if (ctrl->type == MVM_JIT_CONTROL_BREAKPOINT) {
        /* brrts evil testing purposes breakpoint */
        //| int 3;
        dasm_put(Dst, 3523);
#line 2492 "src/jit/emit_x64.dasc"
    } else {
        MVM_panic(1, "Unknown conrtol code: <%s>", ctrl->ins->info->name);
    }
}

void MVM_jit_emit_data(MVMThreadContext *tc, MVMJitGraph *jg, MVMJitData *data, dasm_State **Dst) {
    MVMuint8 *bytes = data->data;
    MVMint32 i;
    //|.data;
    dasm_put(Dst, 204);
#line 2501 "src/jit/emit_x64.dasc"
    //|=>(data->label):
    dasm_put(Dst, 393, (data->label));
#line 2502 "src/jit/emit_x64.dasc"
    for (i = 0; i < data->size; i++) {
        //|.byte bytes[i];
        dasm_put(Dst, 2458, bytes[i]);
#line 2504 "src/jit/emit_x64.dasc"
    }
    //|.code
    dasm_put(Dst, 0);
#line 2506 "src/jit/emit_x64.dasc"
}

Coverage Report

Created: 2017-09-04 06:32