/home/travis/build/MoarVM/MoarVM/src/jit/x64/emit.c

Source (jump to first uncovered line)
/*
** This file has been pre-processed with DynASM.
** http://luajit.org/dynasm.html
** DynASM version 1.3.0, DynASM x64 version 1.3.0
** DO NOT EDIT! The original file is in "src/jit/x64/emit.dasc".
*/

#line 1 "src/jit/x64/emit.dasc"
/* -*-C-*- */
#include "moar.h"
#include "jit/internal.h"
#include "dasm_x86.h"

#ifdef _MSC_VER
#pragma warning( disable : 4129 )
#endif

/**
 * CONVENTIONS

 * Much of this file contains snippets of assembly code, which are concatenated
 * at runtime in order to form a single executable routine. It is essential for
 * the correctness of the result that each of the snippets behaves
 * nicely. Because you can't be expected to know what that is, it is documented
 * here.

 * REGISTERS:

 * Register and calling conventions differ between POSIX and windows
 * systems. The registers rax, rcx, rdx, r8, r9, r10 and r11 are caller-saved,
 * meaning that you are free to overwrrite them, and functions you may call are
 * free to do thesame. Hence you should save their values on stack, if you wish
 * to keep them after calling. In contrast, rbx, rsp, rbp, and r12-r15 are
 * callee-saved, meaning that their values before entering and after returning
 * from a function must be the same. POSIX also makes rdi and rsi caller-saved,
 * windows makes them callee-saved. For this reason we avoid using them.  The
 * first 4 (windows) or 6 (POSIX) function call arguments are placed in
 * registers. These registers sets are not the same between windows and POSIX,
 * but they're always caller-saved.

 * To deal with the ambiguity, register names have been aliased.

 * + RV stands for 'return value', and is aliased to rax
 * + TMP1-6 are the 6 shared caller-saved registers
 * + ARG1-4 are (different) aliases for argument registers
 * + TC, CU, WORK are registers that hold interpreter variables; these are callee-
 *   saved registers set up at entry and restored at exit
 * + TMP5 (r10) is also aliased as FUNCTION; it never conflicts with an argument
 *   register, and neither does TMP6.
 * + The suffixes d, w, and b stand for the 4, 2, and 1 byte-width value of the
 *   registers.

 * Note that the current convention for function calls is to load the function
 * pointer as a 64 bit value in a register from the machine code, and call on
 * that register. This is not ideal, but call doesn't natively take 64 bit
 * values, and it is neccesary to ensure that the function lives within 32 bits
 * distance from the function otherwise. Other methods are being considered.

 * LABELS:

 * Don't use dynamic labels in this code, unless they have been passed to you
 * from outside. Dynamic labels need to be allocated and not conflict, hence
 * just picking one is typically unsafe. Local labels are usually safe.

 * WRITE BARRIERS:

 * Use of write barriers is tricky, because they may involve a function call, and
 * that may or may not mean you have to store your temporaries on the stack.
 * Hence, a write barrier (MVM_ASSIGN_REF) is split into two parts:

 * + check_wb (root, value, label)
 * + hit_wb (root)

 * You should have the label parameter point somewhere after hit_wb, and save
 * and restore your temporaries around the hib_wb.
 **/


//|.arch x64
#if DASM_VERSION != 10300
#error "Version mismatch between DynASM and included encoding engine"
#endif
#line 72 "src/jit/x64/emit.dasc"
//|.actionlist actions
static const unsigned char actions[5296] = {
  254,0,85,72,137,229,255,72,129,250,236,0,1,0,0,255,76,137,117,250,248,76,
  137,109,250,240,72,137,93,250,232,255,73,137,250,254,73,137,250,245,77,139,
  158,231,73,139,155,231,255,72,141,68,36,250,248,73,137,134,231,255,250,255,
  226,255,246,10,255,73,199,134,231,0,0,0,0,255,76,139,117,250,248,76,139,109,
  250,240,72,139,93,250,232,255,72,137,250,236,93,195,255,72,185,235,235,72,
  137,139,231,255,72,199,131,231,235,255,73,139,141,231,72,139,137,231,72,137,
  139,231,255,73,139,142,231,72,139,137,231,72,137,139,231,255,72,139,139,231,
  72,139,137,231,255,72,139,137,231,73,139,150,231,72,139,146,231,72,133,201,
  72,15,68,202,255,77,139,158,231,255,77,139,155,231,255,77,139,147,231,255,
  77,139,146,231,255,77,133,210,15,133,242,247,255,76,137,250,247,76,137,222,
  72,199,194,235,254,1,246,5,235,235,254,0,250,255,21,242,5,255,73,137,194,
  246,1,255,76,137,147,231,255,76,139,155,231,77,139,155,231,255,76,139,147,
  231,102,65,250,247,130,231,234,15,133,242,247,77,139,154,231,77,139,155,231,
  65,129,187,231,237,15,133,242,247,77,139,154,231,76,137,250,247,72,139,179,
  231,76,137,218,254,1,250,255,21,242,5,72,137,131,231,250,233,242,248,246,
  1,76,137,250,247,72,190,235,235,254,1,250,255,21,242,5,246,2,255,76,137,250,
  247,255,73,139,181,231,72,139,182,231,72,199,194,235,254,1,250,255,21,242,
  5,72,133,192,15,132,242,247,72,139,0,72,137,131,231,250,233,242,248,246,1,
  77,139,134,231,77,139,128,231,76,137,131,231,246,2,255,73,139,142,231,255,
  72,139,145,231,76,139,131,231,76,137,130,231,255,102,250,247,129,231,234,
  15,132,242,248,77,133,192,15,132,242,248,102,65,250,247,128,231,234,15,133,
  242,248,72,137,206,76,137,250,247,254,1,72,139,139,231,72,139,145,231,72,
  139,146,231,129,186,231,237,15,133,242,247,102,250,247,129,231,234,15,132,
  242,248,246,1,76,137,250,247,72,190,235,235,254,1,250,255,21,242,5,246,2,
  72,139,177,231,72,139,147,231,76,137,250,247,254,1,250,255,21,242,5,72,137,
  131,231,255,73,139,142,231,72,139,137,231,72,139,137,231,72,137,139,231,255,
  72,139,139,231,72,141,145,231,76,139,137,231,77,141,145,231,77,133,201,73,
  15,69,210,255,76,139,2,77,133,192,255,15,133,242,249,255,77,139,134,231,77,
  139,128,231,246,3,255,76,139,2,255,77,133,192,15,133,242,250,255,77,139,134,
  231,77,139,128,231,77,139,128,231,255,102,250,247,129,231,234,15,132,242,
  249,77,133,192,15,132,242,249,102,65,250,247,128,231,234,15,133,242,249,72,
  137,85,216,76,137,69,208,72,139,179,231,76,137,250,247,254,1,250,255,21,242,
  5,76,139,69,208,72,139,85,216,246,3,255,76,137,2,246,4,255,76,139,2,77,133,
  192,15,133,242,250,255,76,137,250,247,73,139,182,231,72,139,182,231,72,139,
  182,231,254,1,250,255,21,242,5,73,137,192,255,250,255,21,242,5,76,139,69,
  208,72,139,85,216,246,3,76,137,2,255,76,137,131,231,255,72,139,139,231,72,
  139,147,231,255,102,250,247,129,231,234,15,132,242,248,72,133,210,15,132,
  242,248,102,250,247,130,231,234,15,133,242,248,255,250,255,21,242,5,72,139,
  139,231,72,139,147,231,246,2,255,72,137,145,231,255,72,139,139,231,72,139,
  145,231,72,137,147,231,255,72,139,139,231,72,139,147,231,72,139,137,231,72,
  137,17,255,72,139,139,231,76,139,129,231,73,139,16,72,137,147,231,255,72,
  139,139,231,72,139,147,231,76,141,129,231,73,131,184,231,0,15,132,242,247,
  77,139,128,231,246,1,255,102,250,247,129,231,234,15,132,242,248,72,133,210,
  15,132,242,248,102,250,247,130,231,234,15,133,242,248,72,137,85,216,76,137,
  69,208,72,139,179,231,76,137,250,247,254,1,250,255,21,242,5,76,139,69,208,
  72,139,85,216,246,2,255,73,137,144,231,255,72,139,139,231,72,137,139,231,
  255,72,139,139,231,73,137,142,231,255,73,139,142,231,72,131,250,249,0,15,
  132,242,248,73,139,150,231,72,131,250,250,0,15,132,242,247,77,139,134,231,
  77,139,128,231,76,57,194,15,133,242,248,246,1,72,137,139,231,73,199,134,231,
  235,250,233,242,249,246,2,73,139,142,231,72,139,137,231,72,137,139,231,246,
  3,255,76,137,250,247,73,139,182,231,254,1,72,139,139,231,102,250,247,129,
  231,234,15,133,242,247,72,139,145,231,72,139,146,231,129,186,231,237,15,132,
  242,248,246,1,76,137,250,247,72,190,235,235,254,1,250,255,21,242,5,246,2,
  72,137,139,231,255,73,139,142,231,72,139,137,231,72,133,201,15,132,242,247,
  72,139,137,231,246,1,72,137,139,231,255,73,139,141,231,255,72,199,131,231,
  0,0,0,0,255,72,139,139,231,72,133,201,15,148,210,72,15,182,210,72,137,147,
  231,255,76,139,147,231,102,65,250,247,130,231,234,15,133,242,247,77,139,154,
  231,77,139,155,231,65,129,187,231,237,15,133,242,247,76,137,250,247,73,139,
  178,231,72,139,147,231,254,1,72,129,131,231,237,255,72,129,171,231,237,255,
  72,129,139,231,237,255,72,129,163,231,237,255,72,129,179,231,237,255,72,139,
  131,231,255,72,1,131,231,255,72,41,131,231,255,72,9,131,231,255,72,33,131,
  231,255,72,49,131,231,255,72,129,192,237,255,72,129,250,232,237,255,72,129,
  200,237,255,72,129,224,237,255,72,129,250,240,237,255,72,3,131,231,255,72,
  43,131,231,255,72,11,131,231,255,72,35,131,231,255,72,51,131,231,255,72,15,
  175,131,231,255,138,139,231,72,211,224,255,138,139,231,72,211,250,232,255,
  72,49,192,72,139,139,231,72,57,193,15,140,242,249,72,250,255,192,76,139,131,
  231,246,1,72,250,247,193,1,0,0,0,15,132,242,248,73,250,247,250,232,246,2,
  77,15,175,192,72,209,250,233,15,133,242,1,246,3,72,137,131,231,255,72,139,
  131,231,72,139,139,231,72,131,250,249,0,15,133,242,247,76,137,250,247,72,
  190,235,235,254,1,250,255,21,242,5,246,1,255,15,156,214,72,131,250,248,0,
  15,156,210,48,250,242,68,15,182,194,72,153,72,250,247,250,249,72,133,210,
  15,149,209,65,32,200,255,76,41,192,72,137,131,231,255,250,255,21,242,5,246,
  1,72,153,72,250,247,250,249,72,137,147,231,255,72,131,131,231,1,255,72,131,
  171,231,1,255,72,139,139,231,72,250,247,209,72,137,139,231,255,72,139,139,
  231,72,250,247,217,72,137,139,231,255,72,139,131,231,72,152,72,137,131,231,
  255,72,139,139,231,255,102,137,202,72,137,147,231,255,250,242,15,16,131,231,
  255,250,242,15,88,131,231,255,250,242,15,92,131,231,255,250,242,15,89,131,
  231,255,250,242,15,94,131,231,255,250,242,15,17,131,231,255,250,242,72,15,
  42,131,231,250,242,15,17,131,231,255,250,242,72,15,44,131,231,72,137,131,
  231,255,72,199,193,1,0,0,0,72,193,225,63,72,139,147,231,72,49,202,72,137,
  147,231,255,72,59,131,231,255,15,148,208,255,15,149,208,255,15,156,208,255,
  15,158,208,255,15,159,208,255,15,157,208,255,72,15,182,192,72,137,131,231,
  255,72,59,139,231,255,15,159,210,72,15,182,210,65,15,156,208,77,15,182,192,
  76,41,194,72,137,147,231,255,72,199,194,1,0,0,0,255,72,199,194,250,255,250,
  255,250,255,250,255,255,72,199,194,0,0,0,0,255,72,59,147,231,255,72,199,193,
  0,0,0,0,255,72,199,193,1,0,0,0,255,250,242,15,16,131,231,102,15,46,131,231,
  255,15,147,209,255,15,155,210,72,15,68,202,255,15,154,210,72,15,68,202,255,
  15,151,209,255,72,15,182,201,72,137,139,231,255,250,242,15,16,131,231,250,
  242,15,16,139,231,102,15,46,193,15,151,209,72,15,182,193,102,15,46,200,15,
  151,209,72,15,182,201,72,41,200,72,137,131,231,255,72,199,199,235,72,139,
  179,231,72,139,147,231,254,1,72,129,250,248,237,15,148,208,255,72,129,250,
  248,237,15,149,208,255,72,139,139,231,72,133,201,15,132,242,247,72,139,137,
  231,72,139,137,231,72,129,185,231,237,15,133,242,247,72,199,131,231,1,0,0,
  0,250,233,242,248,246,1,72,199,131,231,0,0,0,0,246,2,255,72,139,139,231,72,
  139,145,231,72,131,194,1,76,139,129,231,255,76,57,194,15,156,209,72,15,182,
  201,72,137,139,231,255,72,139,139,231,72,139,145,231,72,133,210,15,149,210,
  72,15,182,210,72,137,147,231,255,76,139,155,231,77,133,219,15,132,242,247,
  76,137,250,247,73,139,179,231,76,139,150,231,77,139,146,231,65,250,255,210,
  76,15,183,152,231,246,1,76,137,155,231,255,76,139,155,231,77,133,219,15,132,
  242,247,73,139,179,231,76,139,150,231,77,139,146,231,76,137,250,247,65,250,
  255,210,76,15,183,152,231,77,133,219,15,132,242,247,76,15,183,152,231,246,
  1,76,137,155,231,255,76,139,147,231,77,133,210,15,132,242,247,76,137,250,
  247,73,139,178,231,76,139,150,231,77,139,146,231,65,250,255,210,76,139,152,
  231,73,131,250,251,1,15,133,242,247,76,139,152,231,76,137,155,231,250,233,
  242,248,246,1,72,199,131,231,0,0,0,0,246,2,255,72,139,139,231,72,133,201,
  15,149,210,77,139,134,231,77,139,128,231,76,57,193,65,15,149,208,68,32,194,
  72,15,182,210,72,137,147,231,255,76,139,147,231,77,139,154,231,77,139,155,
  231,65,129,187,231,237,15,132,242,247,76,137,250,247,72,190,235,235,254,1,
  250,255,21,242,5,246,1,76,137,250,247,76,137,214,254,1,250,255,21,242,5,246,
  1,76,137,250,247,72,139,179,231,76,137,210,254,1,72,139,139,231,72,133,201,
  15,148,210,77,139,134,231,77,139,128,231,76,57,193,65,15,148,208,68,8,194,
  72,15,182,210,72,137,147,231,255,76,137,250,247,72,199,198,235,254,1,250,
  255,21,242,5,73,139,142,231,72,139,137,231,72,139,137,231,72,137,136,231,
  102,199,128,231,234,65,139,142,231,137,136,231,72,137,131,231,255,76,139,
  147,231,77,133,210,255,15,132,242,247,102,65,250,247,130,231,234,255,15,133,
  242,247,77,139,154,231,77,139,155,231,77,133,219,255,15,132,242,247,76,137,
  250,247,76,137,214,72,141,147,231,77,139,147,231,65,250,255,210,250,233,242,
  248,246,1,255,76,137,147,231,246,2,255,72,139,139,231,72,133,201,15,132,242,
  247,72,139,137,231,72,139,137,231,72,133,201,246,1,15,149,209,72,15,182,201,
  72,137,139,231,255,73,139,142,231,72,139,137,231,72,139,137,231,72,139,147,
  231,72,139,146,231,72,57,209,15,133,242,247,77,139,134,231,77,139,128,231,
  77,139,128,231,76,137,131,231,250,233,242,248,246,1,255,76,137,250,247,72,
  139,179,231,255,73,139,149,231,72,139,146,231,72,199,193,235,76,141,155,231,
  77,137,216,254,1,72,139,139,231,72,133,201,15,132,242,247,102,250,247,129,
  231,234,15,133,242,247,72,199,131,231,1,0,0,0,250,233,242,248,246,1,72,199,
  131,231,0,0,0,0,246,2,255,72,139,139,231,72,139,137,231,72,199,194,1,0,0,
  0,73,184,235,235,76,59,129,231,15,133,242,247,76,139,137,231,77,133,201,15,
  133,242,247,76,33,202,246,1,72,137,147,231,255,73,139,142,231,72,137,139,
  231,73,199,134,231,0,0,0,0,255,73,139,142,231,72,133,201,15,132,242,247,72,
  139,137,231,72,137,139,231,250,233,242,248,246,1,73,139,142,231,72,139,137,
  231,72,137,139,231,246,2,255,65,139,142,231,131,193,1,65,137,142,231,72,137,
  139,231,255,65,139,142,231,131,250,233,1,65,137,142,231,72,137,139,231,255,
  72,139,179,231,76,139,150,231,77,139,146,231,77,133,210,15,133,242,247,76,
  137,250,247,72,190,235,235,254,1,250,255,21,242,5,246,1,76,137,250,247,72,
  139,147,231,255,65,250,255,210,255,76,137,250,247,72,139,179,231,72,199,194,
  235,254,1,250,255,21,242,5,72,133,192,15,132,242,247,72,139,0,246,1,72,137,
  131,231,255,73,139,182,231,72,141,182,231,102,68,139,150,231,102,68,59,150,
  231,15,132,242,247,76,137,250,247,254,1,72,139,139,231,72,133,201,15,133,
  242,247,76,137,250,247,254,1,76,137,250,247,73,139,182,231,72,139,182,231,
  72,199,194,235,254,1,76,137,250,247,73,139,182,231,72,139,182,231,72,139,
  182,231,72,199,194,235,254,1,72,139,139,231,139,145,231,77,49,192,131,250,
  250,0,15,142,242,247,77,139,134,231,77,139,128,231,77,139,4,208,77,139,128,
  231,246,1,76,137,131,231,255,102,250,247,129,231,234,15,133,242,247,72,139,
  145,231,72,139,146,231,129,186,231,237,15,132,242,248,246,1,255,76,137,250,
  247,72,139,179,231,72,49,210,254,1,72,137,198,255,72,141,187,231,77,139,158,
  231,73,137,187,231,255,65,198,131,231,233,255,73,139,190,231,72,139,63,73,
  137,187,231,255,76,137,250,247,72,139,147,231,72,139,138,231,72,139,145,231,
  72,139,137,231,76,139,150,231,77,139,146,231,65,250,255,210,255,250,255,21,
  242,5,246,2,72,139,145,231,72,15,183,146,231,72,137,147,231,255,250,255,21,
  242,5,246,2,72,139,145,231,102,68,139,130,231,102,139,146,231,102,68,57,194,
  15,149,208,72,15,182,192,72,137,131,231,255,250,255,21,242,5,246,2,72,139,
  177,231,76,137,250,247,254,1,77,139,134,231,255,72,139,139,231,102,250,247,
  129,231,234,15,133,242,247,72,139,145,231,72,139,146,231,129,186,231,237,
  15,133,242,247,72,139,145,231,72,137,147,231,250,233,242,248,246,1,76,137,
  250,247,72,190,235,235,254,1,72,139,145,231,72,139,146,231,129,186,231,237,
  15,132,242,247,255,250,255,21,242,5,246,1,72,139,147,231,72,137,145,231,255,
  77,139,134,231,76,137,131,231,255,76,137,250,247,72,139,183,231,72,141,182,
  231,72,199,194,235,254,1,76,137,250,247,72,139,183,231,72,141,182,231,254,
  1,76,137,250,247,72,139,179,231,72,139,147,231,72,139,139,231,76,141,131,
  231,76,139,150,231,77,139,146,231,77,139,146,231,65,250,255,210,255,76,137,
  250,247,72,139,179,231,76,139,150,231,77,139,146,231,77,139,146,231,65,250,
  255,210,72,137,131,231,255,76,137,250,247,72,139,179,231,72,139,147,231,76,
  139,150,231,77,139,146,231,77,139,146,231,65,250,255,210,255,77,137,250,243,
  255,77,137,250,235,255,77,139,158,231,77,141,155,231,255,77,139,158,231,77,
  139,155,231,255,76,139,155,231,255,76,141,155,231,255,77,139,157,231,77,139,
  155,231,255,73,199,195,235,255,73,187,235,235,255,76,139,155,231,77,141,155,
  231,255,77,139,150,231,77,139,18,77,49,219,102,69,139,154,231,78,139,28,219,
  255,76,141,29,243,255,77,139,158,231,77,139,155,231,77,139,155,231,255,77,
  139,158,231,77,139,155,231,77,141,155,231,255,77,139,158,231,77,139,155,231,
  77,139,155,231,77,139,155,231,255,76,139,157,231,255,76,137,223,255,76,137,
  222,255,76,137,218,255,76,137,217,255,77,137,216,255,77,137,217,255,102,73,
  15,110,195,255,102,73,15,110,203,255,102,73,15,110,211,255,102,73,15,110,
  219,255,102,73,15,110,227,255,102,73,15,110,250,235,255,102,73,15,110,250,
  243,255,102,73,15,110,250,251,255,68,136,156,251,36,231,255,102,68,137,156,
  251,36,231,255,76,137,156,251,36,231,255,72,139,8,72,137,139,231,255,72,139,
  139,231,72,137,8,255,73,139,142,231,72,139,9,72,49,210,102,139,145,231,72,
  137,4,211,255,72,133,192,15,132,242,250,72,139,8,250,233,242,251,246,4,73,
  139,142,231,72,139,137,231,246,5,72,137,139,231,255,72,137,133,231,255,73,
  131,190,231,0,15,132,242,247,76,137,250,247,254,1,250,233,242,10,255,250,
  233,243,255,72,139,131,231,72,133,192,15,133,243,255,72,139,131,231,72,133,
  192,15,132,243,255,102,72,15,110,131,231,102,15,87,201,102,15,46,193,15,138,
  243,15,133,243,255,102,72,15,110,131,231,102,15,87,201,102,15,46,193,15,138,
  242,247,15,133,242,247,250,233,243,246,1,255,76,137,250,247,72,139,179,231,
  254,1,250,255,21,242,5,72,133,192,255,72,139,139,231,72,133,201,15,132,242,
  247,73,139,150,231,72,139,146,231,72,57,209,15,132,242,247,250,233,243,246,
  1,255,72,139,139,231,72,133,201,15,132,242,247,131,185,231,0,15,132,242,247,
  250,233,243,246,1,255,72,139,139,231,72,133,201,15,132,243,131,185,231,0,
  15,132,243,246,1,255,76,137,250,247,72,139,179,231,72,139,147,231,255,73,
  139,141,231,72,139,137,231,254,1,72,131,250,248,250,255,255,15,142,243,255,
  15,140,243,255,15,141,243,255,15,143,243,255,73,139,150,231,72,139,146,231,
  72,139,146,231,255,72,133,201,15,132,242,247,255,72,59,145,231,15,133,242,
  247,255,102,250,247,129,231,234,255,102,250,247,129,231,234,15,133,242,247,
  255,76,139,129,231,77,139,128,231,65,129,184,231,237,15,133,242,247,72,59,
  145,231,15,133,242,247,255,72,57,202,15,133,242,247,255,72,57,202,15,132,
  242,247,255,102,250,247,129,231,234,15,132,242,247,255,76,137,250,247,72,
  199,198,235,72,199,194,235,254,1,250,233,242,10,246,2,255,73,139,150,231,
  72,139,18,77,139,150,231,73,137,146,231,255,77,137,154,231,255,65,198,130,
  231,233,255,73,199,130,231,235,255,72,141,147,231,73,137,146,231,255,76,139,
  139,231,77,137,138,231,255,73,185,235,235,77,137,138,231,255,77,139,141,231,
  77,139,137,231,77,137,138,231,255,76,137,250,247,72,139,179,231,76,137,218,
  72,199,193,235,254,1,73,139,181,231,72,139,182,231,72,141,147,231,72,199,
  193,235,77,139,134,231,77,139,128,231,77,139,128,231,77,139,141,231,77,139,
  137,231,254,1,76,137,85,216,76,137,93,208,255,76,137,250,247,72,139,179,231,
  72,141,85,208,76,137,209,73,199,192,0,0,0,0,254,1,76,139,93,208,76,139,85,
  216,255,76,137,250,247,72,137,198,76,137,218,76,137,209,255,76,139,144,231,
  77,139,146,231,65,250,255,210,255,72,139,139,231,72,131,250,249,0,15,140,
  242,248,72,129,250,249,237,15,141,242,248,72,107,201,8,72,141,21,242,247,
  72,1,202,250,255,226,248,7,246,1,255,247,250,233,243,248,7,255,205,3,255,
  64,252,138,128,251,238,10,238,8,231,255,102,253,139,128,251,238,10,238,8,
  231,255,72,252,139,128,251,238,10,238,8,231,255,64,252,136,128,251,238,10,
  238,8,231,255,102,253,137,128,251,238,10,238,8,231,255,72,252,137,128,251,
  238,10,238,8,231,255,72,252,137,192,238,14,238,12,255,144,255,72,252,141,
  128,251,238,10,238,8,231,255,72,252,141,132,251,238,10,192,238,15,238,13,
  231,255,72,252,184,238,0,235,235,255,72,252,199,192,238,12,235,255,253,138,
  128,251,238,10,238,8,231,255,64,252,138,132,251,238,10,192,238,15,238,13,
  231,255,102,253,139,132,251,238,10,192,238,15,238,13,231,255,72,252,139,132,
  251,238,10,192,238,15,238,13,231,255,64,252,136,132,251,238,10,192,238,15,
  238,13,231,255,102,253,137,132,251,238,10,192,238,15,238,13,231,255,72,252,
  137,132,251,238,10,192,238,15,238,13,231,255,102,64,252,15,190,192,238,14,
  238,12,255,253,15,191,192,238,14,238,12,255,72,252,15,190,192,238,14,238,
  12,255,72,252,15,191,192,238,14,238,12,255,253,137,192,238,14,72,152,72,252,
  137,192,238,12,255,102,64,252,15,182,192,238,14,238,12,255,253,15,183,192,
  238,14,238,12,255,72,252,15,182,192,238,14,238,12,255,72,252,15,183,192,238,
  14,238,12,255,253,137,192,238,14,238,12,255,72,252,137,192,238,14,255,72,
  252,1,192,238,14,238,12,255,72,184,235,235,72,252,1,192,238,12,255,72,252,
  129,192,238,12,237,255,72,252,184,238,0,235,235,72,252,1,192,238,14,238,12,
  255,72,252,137,192,238,14,238,12,72,252,129,192,238,12,237,255,64,252,2,128,
  251,238,10,238,8,231,255,102,253,3,128,251,238,10,238,8,231,255,72,252,3,
  128,251,238,10,238,8,231,255,64,252,2,132,251,238,10,192,238,15,238,13,231,
  255,102,253,3,132,251,238,10,192,238,15,238,13,231,255,72,252,3,132,251,238,
  10,192,238,15,238,13,231,255,72,252,33,192,238,14,238,12,255,72,184,235,235,
  72,252,33,192,238,12,255,72,252,129,224,238,12,237,255,72,252,184,238,0,235,
  235,72,252,33,192,238,14,238,12,255,72,252,137,192,238,14,238,12,72,252,129,
  224,238,12,237,255,64,252,34,128,251,238,10,238,8,231,255,102,253,35,128,
  251,238,10,238,8,231,255,72,252,35,128,251,238,10,238,8,231,255,64,252,34,
  132,251,238,10,192,238,15,238,13,231,255,102,253,35,132,251,238,10,192,238,
  15,238,13,231,255,72,252,35,132,251,238,10,192,238,15,238,13,231,255,72,252,
  9,192,238,14,238,12,255,72,252,49,192,238,14,238,12,255,72,252,250,247,208,
  238,12,255,72,252,41,192,238,14,238,12,255,72,184,235,235,72,252,41,192,238,
  12,255,72,252,129,250,232,238,12,237,255,72,184,235,235,72,252,137,192,238,
  14,238,12,72,252,41,192,238,12,255,72,252,137,192,238,14,238,12,72,252,129,
  250,232,238,12,237,255,64,252,42,128,251,238,10,238,8,231,255,102,253,43,
  128,251,238,10,238,8,231,255,72,252,43,128,251,238,10,238,8,231,255,64,252,
  42,132,251,238,10,192,238,15,238,13,231,255,102,253,43,132,251,238,10,192,
  238,15,238,13,231,255,72,252,43,132,251,238,10,192,238,15,238,13,231,255,
  64,252,132,192,238,14,238,12,255,102,253,133,192,238,14,238,12,255,72,252,
  133,192,238,14,238,12,255,64,252,128,184,251,238,8,231,0,255,102,253,131,
  184,251,238,8,231,0,255,72,252,131,184,251,238,8,231,0,255,64,252,128,188,
  251,192,238,15,238,13,231,0,255,102,253,131,188,251,192,238,15,238,13,231,
  0,255,72,252,131,188,251,192,238,15,238,13,231,0,255,64,252,250,246,192,238,
  12,233,255,102,253,250,247,192,238,12,234,255,253,250,247,192,238,12,235,
  255,72,252,250,247,192,238,12,235,255,72,184,235,235,72,252,133,192,238,12,
  255,64,252,250,246,128,251,238,8,231,233,255,102,253,250,247,128,251,238,
  8,231,234,255,253,250,247,128,251,238,8,231,235,255,72,252,250,247,128,251,
  238,8,231,235,255,72,184,235,235,72,252,133,128,251,238,8,231,255,64,252,
  56,192,238,14,238,12,255,102,253,57,192,238,14,238,12,255,72,252,57,192,238,
  14,238,12,255,64,252,15,156,208,238,12,255,64,252,15,158,208,238,12,255,64,
  252,15,148,208,238,12,255,64,252,15,149,208,238,12,255,64,252,15,157,208,
  238,12,255,64,252,15,159,208,238,12,255,72,252,141,5,238,2,243,255,253,250,
  255,208,238,12,255,253,250,255,144,251,238,8,231,255
};

#line 73 "src/jit/x64/emit.dasc"
//|.section code, data
#define DASM_SECTION_CODE 0
#define DASM_SECTION_DATA 1
#define DASM_MAXSECTION   2
#line 74 "src/jit/x64/emit.dasc"
//|.globals MVM_JIT_LABEL_
enum {
  MVM_JIT_LABEL_exit,
  MVM_JIT_LABEL__MAX
};
#line 75 "src/jit/x64/emit.dasc"

#if MVM_JIT_LABEL__MAX > MVM_JIT_MAX_GLOBALS
#error "Not enough space for labels"
#endif

/* type declarations */
//|.type REGISTER, MVMRegister
#define Dt1(_V) (int)(ptrdiff_t)&(((MVMRegister *)0)_V)
#line 82 "src/jit/x64/emit.dasc"
//|.type FRAME, MVMFrame
#define Dt2(_V) (int)(ptrdiff_t)&(((MVMFrame *)0)_V)
#line 83 "src/jit/x64/emit.dasc"
//|.type ARGCTX, MVMArgProcContext
#define Dt3(_V) (int)(ptrdiff_t)&(((MVMArgProcContext *)0)_V)
#line 84 "src/jit/x64/emit.dasc"
//|.type CALLSITEPTR, MVMCallsite*
#define Dt4(_V) (int)(ptrdiff_t)&(((MVMCallsite* *)0)_V)
#line 85 "src/jit/x64/emit.dasc"
//|.type CAPTURE, MVMCallCapture
#define Dt5(_V) (int)(ptrdiff_t)&(((MVMCallCapture *)0)_V)
#line 86 "src/jit/x64/emit.dasc"
//|.type CAPTUREBODY, MVMCallCaptureBody
#define Dt6(_V) (int)(ptrdiff_t)&(((MVMCallCaptureBody *)0)_V)
#line 87 "src/jit/x64/emit.dasc"
//|.type ARGPROCCONTEXT, MVMArgProcContext
#define Dt7(_V) (int)(ptrdiff_t)&(((MVMArgProcContext *)0)_V)
#line 88 "src/jit/x64/emit.dasc"
//|.type STATICFRAME, MVMStaticFrame
#define Dt8(_V) (int)(ptrdiff_t)&(((MVMStaticFrame *)0)_V)
#line 89 "src/jit/x64/emit.dasc"
//|.type P6OPAQUE, MVMP6opaque
#define Dt9(_V) (int)(ptrdiff_t)&(((MVMP6opaque *)0)_V)
#line 90 "src/jit/x64/emit.dasc"
//|.type P6OBODY, MVMP6opaqueBody
#define DtA(_V) (int)(ptrdiff_t)&(((MVMP6opaqueBody *)0)_V)
#line 91 "src/jit/x64/emit.dasc"
//|.type MVMITER, MVMIter
#define DtB(_V) (int)(ptrdiff_t)&(((MVMIter *)0)_V)
#line 92 "src/jit/x64/emit.dasc"
//|.type MVMINSTANCE, MVMInstance
#define DtC(_V) (int)(ptrdiff_t)&(((MVMInstance *)0)_V)
#line 93 "src/jit/x64/emit.dasc"
//|.type MVMACTIVEHANDLERS, MVMActiveHandler
#define DtD(_V) (int)(ptrdiff_t)&(((MVMActiveHandler *)0)_V)
#line 94 "src/jit/x64/emit.dasc"
//|.type OBJECT, MVMObject
#define DtE(_V) (int)(ptrdiff_t)&(((MVMObject *)0)_V)
#line 95 "src/jit/x64/emit.dasc"
//|.type STOOGE, MVMObjectStooge
#define DtF(_V) (int)(ptrdiff_t)&(((MVMObjectStooge *)0)_V)
#line 96 "src/jit/x64/emit.dasc"
//|.type VMARRAY, MVMArray
#define Dt10(_V) (int)(ptrdiff_t)&(((MVMArray *)0)_V)
#line 97 "src/jit/x64/emit.dasc"
//|.type COLLECTABLE, MVMCollectable
#define Dt11(_V) (int)(ptrdiff_t)&(((MVMCollectable *)0)_V)
#line 98 "src/jit/x64/emit.dasc"
//|.type STABLE, MVMSTable
#define Dt12(_V) (int)(ptrdiff_t)&(((MVMSTable *)0)_V)
#line 99 "src/jit/x64/emit.dasc"
//|.type REPR, MVMREPROps
#define Dt13(_V) (int)(ptrdiff_t)&(((MVMREPROps *)0)_V)
#line 100 "src/jit/x64/emit.dasc"
//|.type STRING, MVMString
#define Dt14(_V) (int)(ptrdiff_t)&(((MVMString *)0)_V)
#line 101 "src/jit/x64/emit.dasc"
//|.type OBJECTPTR, MVMObject*
#define Dt15(_V) (int)(ptrdiff_t)&(((MVMObject* *)0)_V)
#line 102 "src/jit/x64/emit.dasc"
//|.type CONTEXT, MVMContext
#define Dt16(_V) (int)(ptrdiff_t)&(((MVMContext *)0)_V)
#line 103 "src/jit/x64/emit.dasc"
//|.type CONTAINERSPEC, MVMContainerSpec
#define Dt17(_V) (int)(ptrdiff_t)&(((MVMContainerSpec *)0)_V)
#line 104 "src/jit/x64/emit.dasc"
//|.type STORAGESPEC, MVMStorageSpec
#define Dt18(_V) (int)(ptrdiff_t)&(((MVMStorageSpec *)0)_V)
#line 105 "src/jit/x64/emit.dasc"
//|.type HLLCONFIG, MVMHLLConfig;
#define Dt19(_V) (int)(ptrdiff_t)&(((MVMHLLConfig *)0)_V)
#line 106 "src/jit/x64/emit.dasc"
//|.type SCREF, MVMSerializationContext
#define Dt1A(_V) (int)(ptrdiff_t)&(((MVMSerializationContext *)0)_V)
#line 107 "src/jit/x64/emit.dasc"
//|.type SCREFBODY, MVMSerializationContextBody
#define Dt1B(_V) (int)(ptrdiff_t)&(((MVMSerializationContextBody *)0)_V)
#line 108 "src/jit/x64/emit.dasc"
//|.type NFGSYNTH, MVMNFGSynthetic
#define Dt1C(_V) (int)(ptrdiff_t)&(((MVMNFGSynthetic *)0)_V)
#line 109 "src/jit/x64/emit.dasc"
//|.type CODE, MVMCode
#define Dt1D(_V) (int)(ptrdiff_t)&(((MVMCode *)0)_V)
#line 110 "src/jit/x64/emit.dasc"
//|.type U8, MVMuint8
#define Dt1E(_V) (int)(ptrdiff_t)&(((MVMuint8 *)0)_V)
#line 111 "src/jit/x64/emit.dasc"
//|.type U16, MVMuint16
#define Dt1F(_V) (int)(ptrdiff_t)&(((MVMuint16 *)0)_V)
#line 112 "src/jit/x64/emit.dasc"
//|.type U32, MVMuint32
#define Dt20(_V) (int)(ptrdiff_t)&(((MVMuint32 *)0)_V)
#line 113 "src/jit/x64/emit.dasc"
//|.type U64, MVMuint64
#define Dt21(_V) (int)(ptrdiff_t)&(((MVMuint64 *)0)_V)
#line 114 "src/jit/x64/emit.dasc"


/* Static allocation of relevant types to registers. I pick
 * callee-save registers for efficiency. It is likely we'll be calling
 * quite a C functions, and this saves us the trouble of storing
 * them. Moreover, C compilers preferentially do not use callee-saved
 * registers, and so in most cases, these won't be touched at all. */
//|.type TC, MVMThreadContext, r14
#define Dt22(_V) (int)(ptrdiff_t)&(((MVMThreadContext *)0)_V)
#line 122 "src/jit/x64/emit.dasc"
/* Alternative base pointer. I'll be using this often, so picking rbx
 * here rather than the extended registers will lead to smaller
 * bytecode */
//|.type WORK, MVMRegister, rbx
#define Dt23(_V) (int)(ptrdiff_t)&(((MVMRegister *)0)_V)
#line 126 "src/jit/x64/emit.dasc"
//|.type CU, MVMCompUnit, r13
#define Dt24(_V) (int)(ptrdiff_t)&(((MVMCompUnit *)0)_V)
#line 127 "src/jit/x64/emit.dasc"




const MVMint32 MVM_jit_support(void) {
#ifdef __i386__
    /* Usually, this file should only be compiled only on a amd64
       platform; but when compiling 'fat' or 'universal' binaries, we
       may compile it for other platform. In this case we use the
       runtime check to disable the JIT */
    return 0;
#else
    return 1;
#endif
}

const unsigned char * MVM_jit_actions(void) {
    return actions;
}

/* C Call argument registers */
//|.if WIN32
//|.define ARG1, rcx
//|.define ARG2, rdx
//|.define ARG3, r8
//|.define ARG4, r9
//|.define ARG5, [rsp+0x20]
//|.define ARG6, [rsp+0x28]
//|.else
//|.define ARG1, rdi
//|.define ARG2, rsi
//|.define ARG3, rdx
//|.define ARG4, rcx
//|.define ARG5, r8
//|.define ARG6, r9
//|.endif

/* C call argument registers for floating point */
//|.if WIN32
//|.define ARG1F, xmm0
//|.define ARG2F, xmm1
//|.define ARG3F, xmm2
//|.define ARG4F, xmm3
//|.else
//|.define ARG1F, xmm0
//|.define ARG2F, xmm1
//|.define ARG3F, xmm2
//|.define ARG4F, xmm3
//|.define ARG5F, xmm4
//|.define ARG6F, xmm5
//|.define ARG7F, xmm6
//|.define ARG8F, xmm7
//|.endif

/* Special register for the function to be invoked
 * (chosen because it isn't involved in argument passing
 *  and volatile) */
//|.define FUNCTION, r10
/* all-purpose temporary registers */
//|.define TMP1, rcx
//|.define TMP2, rdx
//|.define TMP3, r8
//|.define TMP4, r9
//|.define TMP5, r10
//|.define TMP6, r11
/* same, but 32 bits wide */
//|.define TMP1d, ecx
//|.define TMP2d, edx
//|.define TMP3d, r8d
//|.define TMP4d, r9d
//|.define TMP5d, r10d
//|.define TMP6d, r11d
/* and 16 bits wide */
//|.define TMP1w, cx
//|.define TMP2w, dx
//|.define TMP3w, r8w
//|.define TMP4w, r9w
//|.define TMP5w, r10w
//|.define TMP6w, r11w
/* and 8 bits for good measure */
//|.define TMP1b, cl
//|.define TMP2b, dl
//|.define TMP3b, r8b
//|.define TMP4b, r9b
//|.define TMP5b, r10b
//|.define TMP6b, r11b


/* return value */
//|.define RV, rax
//|.define RVd, eax
//|.define RVF, xmm0


//|.macro callp, funcptr
//|.data
//|5:
//|.dword (MVMuint32)((uintptr_t)(funcptr)), (MVMuint32)((uintptr_t)(funcptr) >> 32);
//|.code
//| call qword [<5];
//|.endmacro


//|.macro check_wb, root, ref, lbl;
//| test word COLLECTABLE:root->flags, MVM_CF_SECOND_GEN;
//| jz lbl;
//| test ref, ref;
//| jz lbl;
//| test word COLLECTABLE:ref->flags, MVM_CF_SECOND_GEN;
//| jnz lbl;
//|.endmacro;

//|.macro hit_wb, obj
//| mov ARG2, obj;
//| mov ARG1, TC;
//| callp &MVM_gc_write_barrier_hit;
//|.endmacro

//|.macro get_spesh_slot, reg, idx;
//| mov reg, TC->cur_frame;
//| mov reg, FRAME:reg->effective_spesh_slots;
//| mov reg, OBJECTPTR:reg[idx];
//|.endmacro

//|.macro get_vmnull, reg
//| mov reg, TC->instance;
//| mov reg, MVMINSTANCE:reg->VMNull;
//|.endmacro

//|.macro get_cur_op, reg
//| mov reg, TC->interp_cur_op
//| mov reg, [reg]
//|.endmacro

//|.macro get_string, reg, idx
//|| MVM_cu_ensure_string_decoded(tc, jg->sg->sf->body.cu, idx);
//| mov reg, CU->body.strings;
//| mov reg, OBJECTPTR:reg[idx];
//|.endmacro

//|.macro test_type_object, reg
//| test word OBJECT:reg->header.flags, MVM_CF_TYPE_OBJECT
//|.endmacro

//|.macro gc_sync_point
//| cmp qword TC->gc_status, 0;
//| je >1;
//| mov ARG1, TC;
//| callp &MVM_gc_enter_from_interrupt;
//|1:
//|.endmacro

//|.macro throw_adhoc, msg
//| mov ARG1, TC;
//| mov64 ARG2, (uintptr_t)(msg);
//| callp &MVM_exception_throw_adhoc;
//|.endmacro

//|.macro get_stable, out, in
//| mov out, aword OBJECT:in->st;
//|.endmacro

//|.macro get_repr, out, in
//| get_stable out, in;
//| mov out, aword STABLE:out->REPR;
//|.endmacro

//|.macro cmp_repr_id, obj, tmp, id
//| get_repr tmp, obj;
//| cmp dword REPR:tmp->ID, id;
//|.endmacro

//|.define FRAME_NR, dword [rbp-0x20]

/* A function prologue is always the same in x86 / x64, because
 * we do not provide variable arguments, instead arguments are provided
 * via a frame. All JIT entry points receive a prologue. */

void MVM_jit_emit_prologue(MVMThreadContext *tc, MVMJitCompiler *compiler,
                           MVMJitGraph *jg) {
    //|.code
    dasm_put(Dst, 0);
#line 308 "src/jit/x64/emit.dasc"
    /* Setup stack */
    //| push rbp;
    //| mov rbp, rsp;
    dasm_put(Dst, 2);
#line 311 "src/jit/x64/emit.dasc"
    /* allocate stack space: 0x100 bytes = 256 bytes
     *
     * layout: [ a: 0x20 | b: 0x40 | c: 0xa0 | d: 0x20 ]
     * a: space for 4 callee-save registers
     * b: small scratch space
     * c: space for stack arguments to c calls
     * d: reserve space for GPR registers to c calls (win64) or more space for
     * stack arguments (posix) */
    //| sub rsp, 0x100;
    dasm_put(Dst, 7);
#line 320 "src/jit/x64/emit.dasc"
    /* save callee-save registers */
    //| mov [rbp-0x8],  TC;
    //| mov [rbp-0x10], CU;
    //| mov [rbp-0x18], WORK;
    dasm_put(Dst, 16);
#line 324 "src/jit/x64/emit.dasc"
    /* setup special frame variables */
    //| mov TC,   ARG1;
    //| mov CU,   ARG2;
    //| mov TMP6, TC->cur_frame;
    //| mov WORK, FRAME:TMP6->work;
    dasm_put(Dst, 32, Dt22(->cur_frame), Dt2(->work));
#line 329 "src/jit/x64/emit.dasc"
    /* If in the future we call a function, the return address into the JIT
     * frame will be stored in this position. */
    if (!jg->no_trampoline) {
        //| lea rax, [rsp-0x8];
        //| mov aword TC->jit_return_address, rax;
        dasm_put(Dst, 49, Dt22(->jit_return_address));
#line 334 "src/jit/x64/emit.dasc"
    }
    /* ARG3 contains our 'entry label' */
    //| jmp ARG3
    dasm_put(Dst, 60);
#line 337 "src/jit/x64/emit.dasc"
}

/* And a function epilogue is also always the same */
void MVM_jit_emit_epilogue(MVMThreadContext *tc, MVMJitCompiler *compiler, MVMJitGraph *jg) {
    //| ->exit:
    dasm_put(Dst, 64);
#line 342 "src/jit/x64/emit.dasc"
    /* clear the return address, so that we know there's no longer a JIT frame
     * on the stack */
    if (!jg->no_trampoline) {
        //| mov aword TC->jit_return_address, 0;
        dasm_put(Dst, 67, Dt22(->jit_return_address));
#line 346 "src/jit/x64/emit.dasc"
    }
    /* restore callee-save registers */
    //| mov TC, [rbp-0x8];
    //| mov CU, [rbp-0x10];
    //| mov WORK, [rbp-0x18];
    dasm_put(Dst, 76);
#line 351 "src/jit/x64/emit.dasc"
    /* Restore stack */
    //| mov rsp, rbp;
    //| pop rbp;
    //| ret;
    dasm_put(Dst, 92);
#line 355 "src/jit/x64/emit.dasc"
}

static MVMuint64 try_emit_gen2_ref(MVMThreadContext *tc, MVMJitCompiler *compiler,
                                   MVMJitGraph *jg, MVMObject *obj, MVMint16 reg) {
    if (!(obj->header.flags & MVM_CF_SECOND_GEN))
        return 0;
    //| mov64 TMP1, (uintptr_t)obj;
    //| mov WORK[reg], TMP1;
    dasm_put(Dst, 99, (unsigned int)((uintptr_t)obj), (unsigned int)(((uintptr_t)obj)>>32), Dt23([reg]));
#line 363 "src/jit/x64/emit.dasc"
    return 1;
}

static MVMint64 fits_in_32_bit(MVMint64 number) {
    /* Used to determine if a 64 bit integer can be safely used as a
     * 32 bit constant for immediate mode access */
    return (number >= INT32_MIN) && (number <= INT32_MAX);
}

/* compile per instruction, can't really do any better yet */
void MVM_jit_emit_primitive(MVMThreadContext *tc, MVMJitCompiler *compiler, MVMJitGraph *jg,
                            MVMJitPrimitive * prim) {
    MVMSpeshIns *ins = prim->ins;
    MVMuint16 op = ins->info->opcode;
    MVM_jit_log(tc, "emit opcode: <%s>\n", ins->info->name);
    /* Quite a few of these opcodes are copies. Ultimately, I want to
     * move copies to their own node (MVMJitCopy or such), and reduce
     * the number of copies (and thereby increase the efficiency), but
     * currently that isn't really feasible. */
    switch (op) {
    case MVM_OP_const_i64_16:
    case MVM_OP_const_i64_32: {
        MVMint32 reg = ins->operands[0].reg.orig;
        /* Upgrade to 64 bit */
        MVMint64 val = (op == MVM_OP_const_i64_16 ? (MVMint64)ins->operands[1].lit_i16 :
                        (MVMint64)ins->operands[1].lit_i32);
        //| mov qword WORK[reg], val;
        dasm_put(Dst, 108, Dt23([reg]), val);
#line 390 "src/jit/x64/emit.dasc"
        break;
    }
    case MVM_OP_const_i64: {
        MVMint32 reg = ins->operands[0].reg.orig;
        MVMint64 val = ins->operands[1].lit_i64;
        //| mov64 TMP1, val;
        //| mov WORK[reg], TMP1;
        dasm_put(Dst, 99, (unsigned int)(val), (unsigned int)((val)>>32), Dt23([reg]));
#line 397 "src/jit/x64/emit.dasc"
        break;
    }
    case MVM_OP_const_n64: {
        MVMint16 reg = ins->operands[0].reg.orig;
        MVMint64 valbytes = ins->operands[1].lit_i64;
        MVM_jit_log(tc, "store const %f\n", ins->operands[1].lit_n64);
        //| mov64 TMP1, valbytes;
        //| mov WORK[reg], TMP1;
        dasm_put(Dst, 99, (unsigned int)(valbytes), (unsigned int)((valbytes)>>32), Dt23([reg]));
#line 405 "src/jit/x64/emit.dasc"
        break;
    }
    case MVM_OP_inf:
    case MVM_OP_neginf:
    case MVM_OP_nan: {
        MVMint16 reg = ins->operands[0].reg.orig;
        MVMRegister tmp;
        if (op == MVM_OP_nan)
            tmp.n64 = MVM_num_nan(tc);
        else if (op == MVM_OP_inf)
            tmp.n64 = MVM_num_posinf(tc);
        else if (op == MVM_OP_neginf)
            tmp.n64 = MVM_num_neginf(tc);
        //| mov64 TMP1, tmp.i64;
        //| mov WORK[reg], TMP1;
        dasm_put(Dst, 99, (unsigned int)(tmp.i64), (unsigned int)((tmp.i64)>>32), Dt23([reg]));
#line 420 "src/jit/x64/emit.dasc"
        break;
    }
    case MVM_OP_const_s: {
         MVMint16 reg = ins->operands[0].reg.orig;
         MVMuint32 idx = ins->operands[1].lit_str_idx;
         MVMStaticFrame *sf = jg->sg->sf;
         MVMString * s = MVM_cu_string(tc, sf->body.cu, idx);
         if (!try_emit_gen2_ref(tc, compiler, jg, (MVMObject*)s, reg)) {
             //| get_string TMP1, idx;
              MVM_cu_ensure_string_decoded(tc, jg->sg->sf->body.cu, idx);
#line 429 "src/jit/x64/emit.dasc"
             //| mov WORK[reg], TMP1;
             dasm_put(Dst, 114, Dt24(->body.strings), Dt15([idx]), Dt23([reg]));
#line 430 "src/jit/x64/emit.dasc"
         }
         break;
    }
    case MVM_OP_null: {
        MVMint16 reg = ins->operands[0].reg.orig;
        //| get_vmnull TMP1;
        //| mov WORK[reg], TMP1;
        dasm_put(Dst, 127, Dt22(->instance), DtC(->VMNull), Dt23([reg]));
#line 437 "src/jit/x64/emit.dasc"
        break;
    }
    case MVM_OP_getwhat:
    case MVM_OP_getwho: {
        MVMint16 dst = ins->operands[0].reg.orig;
        MVMint16 obj = ins->operands[1].reg.orig;
        //| mov TMP1, WORK[obj];
        //| mov TMP1, OBJECT:TMP1->st;
        dasm_put(Dst, 140, Dt23([obj]), DtE(->st));
#line 445 "src/jit/x64/emit.dasc"
        if (op == MVM_OP_getwho) {
            //| mov TMP1, STABLE:TMP1->WHO;
            //| get_vmnull TMP2;
            //| test TMP1, TMP1;
            //| cmovz TMP1, TMP2;
            dasm_put(Dst, 149, Dt12(->WHO), Dt22(->instance), DtC(->VMNull));
#line 450 "src/jit/x64/emit.dasc"
        } else {
            //| mov TMP1, STABLE:TMP1->WHAT;
            dasm_put(Dst, 144, Dt12(->WHAT));
#line 452 "src/jit/x64/emit.dasc"
        }
        //| mov WORK[dst], TMP1;
        dasm_put(Dst, 103, Dt23([dst]));
#line 454 "src/jit/x64/emit.dasc"
        break;
    }
    case MVM_OP_getlex:
    case MVM_OP_sp_getlex_o:
    case MVM_OP_sp_getlex_ins: {
        MVMuint16 *lexical_types;
        MVMStaticFrame * sf = jg->sg->sf;
        MVMint16 dst = ins->operands[0].reg.orig;
        MVMint16 idx = ins->operands[1].lex.idx;
        MVMint16 out = ins->operands[1].lex.outers;
        MVMint16 i;
        //| mov TMP6, TC->cur_frame;
        dasm_put(Dst, 169, Dt22(->cur_frame));
#line 466 "src/jit/x64/emit.dasc"
        for (i = 0; i < out; i++) {
            /* I'm going to skip compiling the check whether the outer
             * node really exists, because if the code has run N times
             * correctly, then the outer frame must have existed then,
             * and since this chain is static, it should still exist
             * now.  If it doesn't exist, that means we crash.
             *
             * NB: inlining /might/ make this all wrong! But, if that
             * happens, the interpreter will panic even without JIT */
            //| mov TMP6, FRAME:TMP6->outer;
            dasm_put(Dst, 174, Dt2(->outer));
#line 476 "src/jit/x64/emit.dasc"
            sf = sf->body.outer;
        }
        /* get array of lexicals */
        //| mov TMP5, FRAME:TMP6->env;
        dasm_put(Dst, 179, Dt2(->env));
#line 480 "src/jit/x64/emit.dasc"
        /* read value */
        //| mov TMP5, REGISTER:TMP5[idx];
        dasm_put(Dst, 184, Dt1([idx]));
#line 482 "src/jit/x64/emit.dasc"
        /* it seems that if at runtime, if the outer frame has been inlined,
         * this /could/ be wrong. But if that is so, the interpreted instruction
         * would also be wrong, because it'd refer to the wrong lexical. */
        lexical_types = (!out && jg->sg->lexical_types ?
                         jg->sg->lexical_types :
                         sf->body.lexical_types);
        MVM_jit_log(tc, "Lexical type of register: %d\n", lexical_types[idx]);
        if (lexical_types[idx] == MVM_reg_obj) {
            MVM_jit_log(tc, "Emit lex vifivy check\n");
            /* if it is zero, check if we need to auto-vivify */
            //| test TMP5, TMP5;
            //| jnz >1;
            dasm_put(Dst, 189);
#line 494 "src/jit/x64/emit.dasc"
            /* setup args */
            //| mov ARG1, TC;
            //| mov ARG2, TMP6;
            //| mov ARG3, idx;
            //| callp &MVM_frame_vivify_lexical;
            dasm_put(Dst, 197, idx);
            dasm_put(Dst, 210, (MVMuint32)((uintptr_t)(&MVM_frame_vivify_lexical)), (MVMuint32)((uintptr_t)(&MVM_frame_vivify_lexical) >> 32));
            dasm_put(Dst, 216);
#line 499 "src/jit/x64/emit.dasc"
            /* use return value for the result */
            //| mov TMP5, RV;
            //|1:
            dasm_put(Dst, 222);
#line 502 "src/jit/x64/emit.dasc"
        }
        /* store the value */
        //| mov WORK[dst], TMP5;
        dasm_put(Dst, 228, Dt23([dst]));
#line 505 "src/jit/x64/emit.dasc"
        break;
    }
    case MVM_OP_sp_getlexvia_o:
    case MVM_OP_sp_getlexvia_ins: {
        MVMint16 dst = ins->operands[0].reg.orig;
        MVMint16 idx = ins->operands[1].lit_ui16;
        MVMint16 out = ins->operands[2].lit_ui16;
        MVMint16 via = ins->operands[3].reg.orig;
        MVMint16 i;
        /* Resolve the frame. */
        //| mov TMP6, WORK[via];
        //| mov TMP6, CODE:TMP6->body.outer;
        dasm_put(Dst, 233, Dt23([via]), Dt1D(->body.outer));
#line 517 "src/jit/x64/emit.dasc"
        for (i = 1; i < out; i++) /* From 1 as we are already at outer */
            //| mov TMP6, FRAME:TMP6->outer;
            dasm_put(Dst, 174, Dt2(->outer));
#line 519 "src/jit/x64/emit.dasc"
        /* get array of lexicals */
        //| mov TMP5, FRAME:TMP6->env;
        dasm_put(Dst, 179, Dt2(->env));
#line 521 "src/jit/x64/emit.dasc"
        /* read value */
        //| mov TMP5, REGISTER:TMP5[idx];
        dasm_put(Dst, 184, Dt1([idx]));
#line 523 "src/jit/x64/emit.dasc"
        if (op == MVM_OP_sp_getlexvia_o) {
            MVM_jit_log(tc, "Emit lex vifivy check for via code-ref lookup\n");
            /* if it is zero, check if we need to auto-vivify */
            //| test TMP5, TMP5;
            //| jnz >1;
            dasm_put(Dst, 189);
#line 528 "src/jit/x64/emit.dasc"
            /* setup args */
            //| mov ARG1, TC;
            //| mov ARG2, TMP6;
            //| mov ARG3, idx;
            //| callp &MVM_frame_vivify_lexical;
            dasm_put(Dst, 197, idx);
            dasm_put(Dst, 210, (MVMuint32)((uintptr_t)(&MVM_frame_vivify_lexical)), (MVMuint32)((uintptr_t)(&MVM_frame_vivify_lexical) >> 32));
            dasm_put(Dst, 216);
#line 533 "src/jit/x64/emit.dasc"
            /* use return value for the result */
            //| mov TMP5, RV;
            //|1:
            dasm_put(Dst, 222);
#line 536 "src/jit/x64/emit.dasc"
        }
        /* store the value */
        //| mov WORK[dst], TMP5;
        dasm_put(Dst, 228, Dt23([dst]));
#line 539 "src/jit/x64/emit.dasc"
        break;
    }
    case MVM_OP_getlexreldyn: {
        MVMint16 dst  = ins->operands[0].reg.orig;
        MVMint16 ctx  = ins->operands[1].reg.orig;
        MVMint16 name = ins->operands[2].reg.orig;
        //| mov TMP5, aword WORK[ctx];
        //| test_type_object TMP5;
        //| jnz >1;
        //| cmp_repr_id TMP5, TMP6, MVM_REPR_ID_MVMContext;
        //| jne >1;
        //| mov TMP6, CONTEXT:TMP5->body.context;
        //| mov ARG1, TC;
        //| mov ARG2, aword WORK[name];
        //| mov ARG3, TMP6;
        //| callp &MVM_frame_getdynlex;
        dasm_put(Dst, 242, Dt23([ctx]), DtE(->header.flags), MVM_CF_TYPE_OBJECT, DtE(->st), Dt12(->REPR), Dt13(->ID), MVM_REPR_ID_MVMContext, Dt16(->body.context), Dt23([name]));
        dasm_put(Dst, 210, (MVMuint32)((uintptr_t)(&MVM_frame_getdynlex)), (MVMuint32)((uintptr_t)(&MVM_frame_getdynlex) >> 32));
#line 555 "src/jit/x64/emit.dasc"
        //| mov WORK[dst], RV;
        //| jmp >2;
        //|1:
        //| throw_adhoc "getlexreldyn needs a context";
        dasm_put(Dst, 291, Dt23([dst]), (unsigned int)((uintptr_t)("getlexreldyn needs a context")), (unsigned int)(((uintptr_t)("getlexreldyn needs a context"))>>32));
        dasm_put(Dst, 210, (MVMuint32)((uintptr_t)(&MVM_exception_throw_adhoc)), (MVMuint32)((uintptr_t)(&MVM_exception_throw_adhoc) >> 32));
#line 559 "src/jit/x64/emit.dasc"
        //|2:
        dasm_put(Dst, 316);
#line 560 "src/jit/x64/emit.dasc"
        break;
    }
    case MVM_OP_getlex_no:
    case MVM_OP_sp_getlex_no: {
        MVMint16  dst = ins->operands[0].reg.orig;
        MVMuint32 idx = ins->operands[1].lit_str_idx;
        //| mov ARG1, TC;
        //| get_string ARG2, idx;
        dasm_put(Dst, 324);
         MVM_cu_ensure_string_decoded(tc, jg->sg->sf->body.cu, idx);
#line 568 "src/jit/x64/emit.dasc"
        //| mov ARG3, MVM_reg_obj;
        //| callp &MVM_frame_find_lexical_by_name;
        dasm_put(Dst, 329, Dt24(->body.strings), Dt15([idx]), MVM_reg_obj);
        dasm_put(Dst, 210, (MVMuint32)((uintptr_t)(&MVM_frame_find_lexical_by_name)), (MVMuint32)((uintptr_t)(&MVM_frame_find_lexical_by_name) >> 32));
#line 570 "src/jit/x64/emit.dasc"
        //| test RV, RV;
        //| jz >1;
        //| mov RV, [RV];
        //| mov WORK[dst], RV;
        //| jmp >2;
        //|1:
        //| get_vmnull TMP3;
        //| mov WORK[dst], TMP3;
        //|2:
        dasm_put(Dst, 343, Dt23([dst]), Dt22(->instance), DtC(->VMNull), Dt23([dst]));
#line 579 "src/jit/x64/emit.dasc"
        break;
    }
    case MVM_OP_bindlex: {
        MVMuint16 *lexical_types;
        MVMStaticFrame *sf = jg->sg->sf;
        MVMint16 idx = ins->operands[0].lex.idx;
        MVMint16 out = ins->operands[0].lex.outers;
        MVMint16 src = ins->operands[1].reg.orig;
        MVMint16 i;
        //| mov TMP1, TC->cur_frame;
        dasm_put(Dst, 383, Dt22(->cur_frame));
#line 589 "src/jit/x64/emit.dasc"
        for (i = 0; i < out; i++) {
            //| mov TMP1, FRAME:TMP1->outer;
            dasm_put(Dst, 144, Dt2(->outer));
#line 591 "src/jit/x64/emit.dasc"
            sf = sf->body.outer;
        }
        lexical_types = (!out && jg->sg->lexical_types ?
                         jg->sg->lexical_types :
                         sf->body.lexical_types);
        //| mov TMP2, FRAME:TMP1->env;
        //| mov TMP3, WORK[src];
        //| mov REGISTER:TMP2[idx], TMP3;
        dasm_put(Dst, 388, Dt2(->env), Dt23([src]), Dt1([idx]));
#line 599 "src/jit/x64/emit.dasc"
        if (lexical_types[idx] == MVM_reg_obj ||
            lexical_types[idx] == MVM_reg_str) {
            //| check_wb TMP1, TMP3, >2;
            //| hit_wb TMP1;
            dasm_put(Dst, 401, Dt11(->flags), MVM_CF_SECOND_GEN, Dt11(->flags), MVM_CF_SECOND_GEN);
            dasm_put(Dst, 210, (MVMuint32)((uintptr_t)(&MVM_gc_write_barrier_hit)), (MVMuint32)((uintptr_t)(&MVM_gc_write_barrier_hit) >> 32));
#line 603 "src/jit/x64/emit.dasc"
            //|2:
            dasm_put(Dst, 316);
#line 604 "src/jit/x64/emit.dasc"
        }
        break;
    }
    case MVM_OP_lexprimspec: {
        MVMint16 dst = ins->operands[0].reg.orig;
        MVMint16 ctx = ins->operands[1].reg.orig;
        MVMint16 name = ins->operands[2].reg.orig;
        //| mov TMP1, WORK[ctx];
        //| cmp_repr_id, TMP1, TMP2, MVM_REPR_ID_MVMContext;
        //| jne >1;
        //| test_type_object TMP1;
        //| jz >2;
        //|1:
        //| throw_adhoc "lexprimspec needs a context";
        dasm_put(Dst, 438, Dt23([ctx]), DtE(->st), Dt12(->REPR), Dt13(->ID), MVM_REPR_ID_MVMContext, DtE(->header.flags), MVM_CF_TYPE_OBJECT, (unsigned int)((uintptr_t)("lexprimspec needs a context")), (unsigned int)(((uintptr_t)("lexprimspec needs a context"))>>32));
        dasm_put(Dst, 210, (MVMuint32)((uintptr_t)(&MVM_exception_throw_adhoc)), (MVMuint32)((uintptr_t)(&MVM_exception_throw_adhoc) >> 32));
#line 618 "src/jit/x64/emit.dasc"
        //|2:
        //| mov ARG2, CONTEXT:TMP1->body.context;
        //| mov ARG3, WORK[name];
        //| mov ARG1, TC;
        //| callp &MVM_frame_lexical_primspec;
        dasm_put(Dst, 480, Dt16(->body.context), Dt23([name]));
        dasm_put(Dst, 210, (MVMuint32)((uintptr_t)(&MVM_frame_lexical_primspec)), (MVMuint32)((uintptr_t)(&MVM_frame_lexical_primspec) >> 32));
#line 623 "src/jit/x64/emit.dasc"
        //| mov WORK[dst], RV;
        dasm_put(Dst, 501, Dt23([dst]));
#line 624 "src/jit/x64/emit.dasc"
        break;
    }
    case MVM_OP_getarg_o:
    case MVM_OP_getarg_n:
    case MVM_OP_getarg_s:
    case MVM_OP_getarg_i: {
        MVMint32 reg = ins->operands[0].reg.orig;
        MVMuint16 idx = ins->operands[1].callsite_idx;
        //| mov TMP1, TC->cur_frame;
        //| mov TMP1, FRAME:TMP1->args;
        //| mov TMP1, REGISTER:TMP1[idx];
        //| mov WORK[reg], TMP1;
        dasm_put(Dst, 511, Dt22(->cur_frame), Dt2(->args), Dt1([idx]), Dt23([reg]));
#line 636 "src/jit/x64/emit.dasc"
        break;
    }
    case MVM_OP_sp_getarg_o:
    case MVM_OP_sp_getarg_n:
    case MVM_OP_sp_getarg_s:
    case MVM_OP_sp_getarg_i: {
        MVMint32 reg = ins->operands[0].reg.orig;
        MVMuint16 idx = ins->operands[1].callsite_idx;
        //| mov TMP1, TC->cur_frame;
        //| mov TMP1, FRAME:TMP1->params.args;
        //| mov TMP1, REGISTER:TMP1[idx];
        //| mov WORK[reg], TMP1;
        dasm_put(Dst, 511, Dt22(->cur_frame), Dt2(->params.args), Dt1([idx]), Dt23([reg]));
#line 648 "src/jit/x64/emit.dasc"
        break;
    }
    case MVM_OP_sp_p6oget_i:
    case MVM_OP_sp_p6oget_n:
    case MVM_OP_sp_p6oget_s:
    case MVM_OP_sp_p6oget_o:
    case MVM_OP_sp_p6ogetvc_o:
    case MVM_OP_sp_p6ogetvt_o: {
        MVMint16 dst    = ins->operands[0].reg.orig;
        MVMint16 obj    = ins->operands[1].reg.orig;
        MVMint16 offset = ins->operands[2].lit_i16;
        MVMint16 body   = offsetof(MVMP6opaque, body);
        /* load address and object */
        //| mov TMP1, WORK[obj];
        //| lea TMP2, [TMP1 + (offset + body)];
        //| mov TMP4, P6OPAQUE:TMP1->body.replaced;
        //| lea TMP5, [TMP4 + offset];
        //| test TMP4, TMP4;
        //| cmovnz TMP2, TMP5;
        dasm_put(Dst, 528, Dt23([obj]), (offset + body), Dt9(->body.replaced), offset);
#line 667 "src/jit/x64/emit.dasc"
        /* TMP2 now contains address of item */
        if (op == MVM_OP_sp_p6oget_o) {
            //| mov TMP3, [TMP2];
            //| test TMP3, TMP3;
            dasm_put(Dst, 552);
#line 671 "src/jit/x64/emit.dasc"
            /* Check if object doesn't point to NULL */
            //| jnz >3;
            dasm_put(Dst, 559);
#line 673 "src/jit/x64/emit.dasc"
            /* Otherwise load VMNull */
            //| get_vmnull TMP3;
            //|3:
            dasm_put(Dst, 564, Dt22(->instance), DtC(->VMNull));
#line 676 "src/jit/x64/emit.dasc"
        } else if (op == MVM_OP_sp_p6ogetvt_o) {
            /* vivify as type object */
            MVMint16 spesh_idx = ins->operands[3].lit_i16;
            //| mov TMP3, [TMP2];
            dasm_put(Dst, 575);
#line 680 "src/jit/x64/emit.dasc"
            /* check for null */
            //| test TMP3, TMP3;
            //| jnz >4;
            dasm_put(Dst, 579);
#line 683 "src/jit/x64/emit.dasc"
            /* if null, vivify as type object from spesh slot */
            //| get_spesh_slot TMP3, spesh_idx;
            dasm_put(Dst, 587, Dt22(->cur_frame), Dt2(->effective_spesh_slots), Dt15([spesh_idx]));
#line 685 "src/jit/x64/emit.dasc"
            /* need to hit write barrier? */
            //| check_wb TMP1, TMP3, >3;
            //| mov qword [rbp-0x28], TMP2; // address
            //| mov qword [rbp-0x30], TMP3; // value
            //| hit_wb WORK[obj]; // write barrier for header
            dasm_put(Dst, 600, Dt11(->flags), MVM_CF_SECOND_GEN, Dt11(->flags), MVM_CF_SECOND_GEN, Dt23([obj]));
            dasm_put(Dst, 210, (MVMuint32)((uintptr_t)(&MVM_gc_write_barrier_hit)), (MVMuint32)((uintptr_t)(&MVM_gc_write_barrier_hit) >> 32));
#line 690 "src/jit/x64/emit.dasc"
            //| mov TMP3, qword [rbp-0x30];
            //| mov TMP2, qword [rbp-0x28];
            //|3:
            dasm_put(Dst, 646);
#line 693 "src/jit/x64/emit.dasc"
            /* store vivified type value in memory location */
            //| mov qword [TMP2], TMP3;
            //|4:
            dasm_put(Dst, 662);
#line 696 "src/jit/x64/emit.dasc"
        } else if (op == MVM_OP_sp_p6ogetvc_o) {
            MVMint16 spesh_idx = ins->operands[3].lit_i16;
            //| mov TMP3, [TMP2];
            //| test TMP3, TMP3;
            //| jnz >4;
            dasm_put(Dst, 668);
#line 701 "src/jit/x64/emit.dasc"
            /* vivify as clone */
            //| mov ARG1, TC;
            //| get_spesh_slot ARG2, spesh_idx;
            //| callp &MVM_repr_clone;
            dasm_put(Dst, 679, Dt22(->cur_frame), Dt2(->effective_spesh_slots), Dt15([spesh_idx]));
            dasm_put(Dst, 210, (MVMuint32)((uintptr_t)(&MVM_repr_clone)), (MVMuint32)((uintptr_t)(&MVM_repr_clone) >> 32));
#line 705 "src/jit/x64/emit.dasc"
            //| mov TMP3, RV;
            dasm_put(Dst, 697);
#line 706 "src/jit/x64/emit.dasc"
            /* reload object and address */
            //| mov TMP1, WORK[obj];
            //| lea TMP2, [TMP1 + (offset + body)];
            //| mov TMP4, P6OPAQUE:TMP1->body.replaced;
            //| lea TMP5, [TMP4 + offset];
            //| test TMP4, TMP4;
            //| cmovnz TMP2, TMP5;
            dasm_put(Dst, 528, Dt23([obj]), (offset + body), Dt9(->body.replaced), offset);
#line 713 "src/jit/x64/emit.dasc"
            /* assign with write barrier */
            //| check_wb TMP1, TMP3, >3;
            //| mov qword [rbp-0x28], TMP2; // address
            //| mov qword [rbp-0x30], TMP3; // value
            //| hit_wb WORK[obj]; // write barrier for header
            dasm_put(Dst, 600, Dt11(->flags), MVM_CF_SECOND_GEN, Dt11(->flags), MVM_CF_SECOND_GEN, Dt23([obj]));
            dasm_put(Dst, 210, (MVMuint32)((uintptr_t)(&MVM_gc_write_barrier_hit)), (MVMuint32)((uintptr_t)(&MVM_gc_write_barrier_hit) >> 32));
#line 718 "src/jit/x64/emit.dasc"
            //| mov TMP3, qword [rbp-0x30];
            //| mov TMP2, qword [rbp-0x28];
            //|3:
            //| mov qword [TMP2], TMP3;
            dasm_put(Dst, 706);
#line 722 "src/jit/x64/emit.dasc"
            /* done */
            //|4:
            dasm_put(Dst, 665);
#line 724 "src/jit/x64/emit.dasc"
        } else {
            /* the regular case */
            //| mov TMP3, [TMP2];
            dasm_put(Dst, 575);
#line 727 "src/jit/x64/emit.dasc"
        }
        /* store in local register */
        //| mov WORK[dst], TMP3;
        dasm_put(Dst, 725, Dt23([dst]));
#line 730 "src/jit/x64/emit.dasc"
        break;
    }
    case MVM_OP_sp_bind_i64:
    case MVM_OP_sp_bind_n:
    case MVM_OP_sp_bind_s:
    case MVM_OP_sp_bind_o: {
        MVMint16 obj    = ins->operands[0].reg.orig;
        MVMint16 offset = ins->operands[1].lit_i16;
        MVMint16 val    = ins->operands[2].reg.orig;
        //| mov TMP1, WORK[obj];            // object
        //| mov TMP2, WORK[val];            // value
        dasm_put(Dst, 730, Dt23([obj]), Dt23([val]));
#line 741 "src/jit/x64/emit.dasc"
        if (op == MVM_OP_sp_bind_o || op == MVM_OP_sp_bind_s) {
            /* check if we should hit write barrier */
            //| check_wb TMP1, TMP2, >2;
            dasm_put(Dst, 739, Dt11(->flags), MVM_CF_SECOND_GEN, Dt11(->flags), MVM_CF_SECOND_GEN);
#line 744 "src/jit/x64/emit.dasc"
            /* note: it is uneccesary to store pointers, because they
               can just be loaded from memory */
            //| hit_wb WORK[obj];
            dasm_put(Dst, 636, Dt23([obj]));
            dasm_put(Dst, 210, (MVMuint32)((uintptr_t)(&MVM_gc_write_barrier_hit)), (MVMuint32)((uintptr_t)(&MVM_gc_write_barrier_hit) >> 32));
#line 747 "src/jit/x64/emit.dasc"
            //| mov TMP1, aword WORK[obj]; // reload object
            //| mov TMP2, aword WORK[val]; // reload value
            //|2: // done
            dasm_put(Dst, 767, Dt23([obj]), Dt23([val]));
#line 750 "src/jit/x64/emit.dasc"
        }
        //| mov qword [TMP1+offset], TMP2; // store value into body
        dasm_put(Dst, 783, offset);
#line 752 "src/jit/x64/emit.dasc"
        break;
    }
    case MVM_OP_sp_get_i64:
    case MVM_OP_sp_get_n:
    case MVM_OP_sp_get_s:
    case MVM_OP_sp_get_o: {
        MVMint16 dst    = ins->operands[0].reg.orig;
        MVMint16 obj    = ins->operands[1].reg.orig;
        MVMint16 offset = ins->operands[2].lit_i16;
        //| mov TMP1, WORK[obj];            // object
        //| mov TMP2, qword [TMP1+offset];   // get value from body
        //| mov WORK[dst], TMP2;
        dasm_put(Dst, 788, Dt23([obj]), offset, Dt23([dst]));
#line 764 "src/jit/x64/emit.dasc"
        break;
    }
    case MVM_OP_sp_deref_bind_i64:
    case MVM_OP_sp_deref_bind_n: {
        MVMint16 obj    = ins->operands[0].reg.orig;
        MVMint16 val    = ins->operands[1].reg.orig;
        MVMint16 offset = ins->operands[2].lit_i16;
        //| mov TMP1, WORK[obj];            // object
        //| mov TMP2, WORK[val];            // value
        //| mov TMP1, qword [TMP1+offset];  // find address of target
        //| mov qword [TMP1], TMP2;
        dasm_put(Dst, 801, Dt23([obj]), Dt23([val]), offset);
#line 775 "src/jit/x64/emit.dasc"
        break;
    }
    case MVM_OP_sp_deref_get_i64:
    case MVM_OP_sp_deref_get_n: {
        MVMint16 dst    = ins->operands[0].reg.orig;
        MVMint16 obj    = ins->operands[1].reg.orig;
        MVMint16 offset = ins->operands[2].lit_i16;
        //| mov TMP1, WORK[obj];            // object
        //| mov TMP3, qword [TMP1+offset];  // get value pointer from body
        //| mov TMP2, qword [TMP3];         // deref the pointer
        //| mov WORK[dst], TMP2;
        dasm_put(Dst, 817, Dt23([obj]), offset, Dt23([dst]));
#line 786 "src/jit/x64/emit.dasc"
        break;
    }
    case MVM_OP_sp_p6obind_i:
    case MVM_OP_sp_p6obind_n:
    case MVM_OP_sp_p6obind_s:
    case MVM_OP_sp_p6obind_o: {
        MVMint16 obj    = ins->operands[0].reg.orig;
        MVMint16 offset = ins->operands[1].lit_i16;
        MVMint16 val    = ins->operands[2].reg.orig;
        //| mov TMP1, WORK[obj];            // object
        //| mov TMP2, WORK[val];            // value
        //| lea TMP3, P6OPAQUE:TMP1->body;  // body
        //| cmp qword P6OBODY:TMP3->replaced, 0;
        //| je >1;
        //| mov TMP3, P6OBODY:TMP3->replaced; // replaced object body
        //|1:
        dasm_put(Dst, 833, Dt23([obj]), Dt23([val]), Dt9(->body), DtA(->replaced), DtA(->replaced));
#line 802 "src/jit/x64/emit.dasc"
        if (op == MVM_OP_sp_p6obind_o || op == MVM_OP_sp_p6obind_s) {
            /* check if we should hit write barrier */
            //| check_wb TMP1, TMP2, >2;
            //| mov qword [rbp-0x28], TMP2; // store value
            //| mov qword [rbp-0x30], TMP3; // store body pointer
            //| hit_wb WORK[obj];
            dasm_put(Dst, 861, Dt11(->flags), MVM_CF_SECOND_GEN, Dt11(->flags), MVM_CF_SECOND_GEN, Dt23([obj]));
            dasm_put(Dst, 210, (MVMuint32)((uintptr_t)(&MVM_gc_write_barrier_hit)), (MVMuint32)((uintptr_t)(&MVM_gc_write_barrier_hit) >> 32));
#line 808 "src/jit/x64/emit.dasc"
            //| mov TMP3, qword [rbp-0x30]; // restore body pointer
            //| mov TMP2, qword [rbp-0x28]; // restore value
            //|2: // done
            dasm_put(Dst, 906);
#line 811 "src/jit/x64/emit.dasc"
        }
        //| mov [TMP3+offset], TMP2; // store value into body
        dasm_put(Dst, 922, offset);
#line 813 "src/jit/x64/emit.dasc"
        break;
    }
    case MVM_OP_getwhere:
    case MVM_OP_set: {
         MVMint32 reg1 = ins->operands[0].reg.orig;
         MVMint32 reg2 = ins->operands[1].reg.orig;
         //| mov TMP1, WORK[reg2];
         //| mov WORK[reg1], TMP1;
         dasm_put(Dst, 927, Dt23([reg2]), Dt23([reg1]));
#line 821 "src/jit/x64/emit.dasc"
         break;
    }
    case MVM_OP_sp_getspeshslot: {
        MVMint16 dst = ins->operands[0].reg.orig;
        MVMint16 spesh_idx = ins->operands[1].lit_i16;
        //| get_spesh_slot TMP1, spesh_idx;
        //| mov WORK[dst], TMP1;
        dasm_put(Dst, 511, Dt22(->cur_frame), Dt2(->effective_spesh_slots), Dt15([spesh_idx]), Dt23([dst]));
#line 828 "src/jit/x64/emit.dasc"
        break;
    }
    case MVM_OP_setdispatcher: {
        MVMint16 src = ins->operands[0].reg.orig;
        //| mov TMP1, aword WORK[src];
        //| mov aword TC->cur_dispatcher, TMP1;
        dasm_put(Dst, 936, Dt23([src]), Dt22(->cur_dispatcher));
#line 834 "src/jit/x64/emit.dasc"
        break;
    }
    case MVM_OP_takedispatcher: {
        MVMint16 dst = ins->operands[0].reg.orig;
        //| mov TMP1, aword TC->cur_dispatcher;
        //| cmp TMP1, 0;
        //| je >2;
        //| mov TMP2, aword TC->cur_dispatcher_for;
        //| cmp TMP2, 0;
        //| je >1;
        //| mov TMP3, TC->cur_frame;
        //| mov TMP3, FRAME:TMP3->code_ref;
        //| cmp TMP2, TMP3;
        //| jne >2;
        //|1:
        //| mov aword WORK[dst], TMP1;
        //| mov aword TC->cur_dispatcher, NULL;
        //| jmp >3;
        //|2:
        //| get_vmnull TMP1;
        //| mov aword WORK[dst], TMP1;
        //|3:
        dasm_put(Dst, 945, Dt22(->cur_dispatcher), Dt22(->cur_dispatcher_for), Dt22(->cur_frame), Dt2(->code_ref), Dt23([dst]), Dt22(->cur_dispatcher), NULL, Dt22(->instance), DtC(->VMNull), Dt23([dst]));
#line 856 "src/jit/x64/emit.dasc"
        break;
    }
    case MVM_OP_ctx: {
        MVMint16 dst = ins->operands[0].reg.orig;
        //| mov ARG1, TC;
        //| mov ARG2, TC->cur_frame;
        //| callp &MVM_frame_context_wrapper;
        dasm_put(Dst, 1018, Dt22(->cur_frame));
        dasm_put(Dst, 210, (MVMuint32)((uintptr_t)(&MVM_frame_context_wrapper)), (MVMuint32)((uintptr_t)(&MVM_frame_context_wrapper) >> 32));
#line 863 "src/jit/x64/emit.dasc"
        //| mov WORK[dst], RV;
        dasm_put(Dst, 501, Dt23([dst]));
#line 864 "src/jit/x64/emit.dasc"
        break;
    }
    case MVM_OP_ctxlexpad: {
        MVMint16 src = ins->operands[1].reg.orig;
        MVMint16 dst = ins->operands[0].reg.orig;
        //| mov TMP1, WORK[src];
        //| test_type_object TMP1;
        //| jnz >1;
        //| cmp_repr_id TMP1, TMP2, MVM_REPR_ID_MVMContext;
        //| je >2;
        //|1:
        //| throw_adhoc "ctxlexpad needs an MVMContext";
        dasm_put(Dst, 1028, Dt23([src]), DtE(->header.flags), MVM_CF_TYPE_OBJECT, DtE(->st), Dt12(->REPR), Dt13(->ID), MVM_REPR_ID_MVMContext, (unsigned int)((uintptr_t)("ctxlexpad needs an MVMContext")), (unsigned int)(((uintptr_t)("ctxlexpad needs an MVMContext"))>>32));
        dasm_put(Dst, 210, (MVMuint32)((uintptr_t)(&MVM_exception_throw_adhoc)), (MVMuint32)((uintptr_t)(&MVM_exception_throw_adhoc) >> 32));
#line 876 "src/jit/x64/emit.dasc"
        //|2:
        //| mov WORK[dst], TMP1;
        dasm_put(Dst, 1070, Dt23([dst]));
#line 878 "src/jit/x64/emit.dasc"
        break;
    }
    case MVM_OP_curcode: {
        MVMint16 dst = ins->operands[0].reg.orig;
        //| mov TMP1, TC->cur_frame;
        //| mov TMP1, aword FRAME:TMP1->code_ref;
        //| mov aword WORK[dst], TMP1;
        dasm_put(Dst, 127, Dt22(->cur_frame), Dt2(->code_ref), Dt23([dst]));
#line 885 "src/jit/x64/emit.dasc"
        break;
    }
    case MVM_OP_getcode: {
        MVMint16 dst = ins->operands[0].reg.orig;
        MVMuint16 idx = ins->operands[1].coderef_idx;
        //| mov TMP1, aword CU->body.coderefs;
        //| mov TMP1, aword OBJECTPTR:TMP1[idx];
        //| mov aword WORK[dst], TMP1;
        dasm_put(Dst, 114, Dt24(->body.coderefs), Dt15([idx]), Dt23([dst]));
#line 893 "src/jit/x64/emit.dasc"
        break;
    }
    case MVM_OP_callercode: {
        MVMint16 dst = ins->operands[0].reg.orig;
        //| mov TMP1, TC->cur_frame;
        //| mov TMP1, aword FRAME:TMP1->caller;
        //| test TMP1, TMP1;
        //| jz >1;
        //| mov TMP1, aword FRAME:TMP1->code_ref;
        //|1:
        //| mov aword WORK[dst], TMP1;
        dasm_put(Dst, 1082, Dt22(->cur_frame), Dt2(->caller), Dt2(->code_ref), Dt23([dst]));
#line 904 "src/jit/x64/emit.dasc"
        break;
    }
    case MVM_OP_hllboxtype_n:
    case MVM_OP_hllboxtype_s:
    case MVM_OP_hllboxtype_i: {
        MVMint16 dst = ins->operands[0].reg.orig;
        //| mov TMP1, CU->body.hll_config;
        dasm_put(Dst, 1108, Dt24(->body.hll_config));
#line 911 "src/jit/x64/emit.dasc"
        if (op == MVM_OP_hllboxtype_n) {
            //| mov TMP1, aword HLLCONFIG:TMP1->num_box_type;
            dasm_put(Dst, 144, Dt19(->num_box_type));
#line 913 "src/jit/x64/emit.dasc"
        } else if (op == MVM_OP_hllboxtype_s) {
            //| mov TMP1, aword HLLCONFIG:TMP1->str_box_type;
            dasm_put(Dst, 144, Dt19(->str_box_type));
#line 915 "src/jit/x64/emit.dasc"
        } else {
            //| mov TMP1, aword HLLCONFIG:TMP1->int_box_type;
            dasm_put(Dst, 144, Dt19(->int_box_type));
#line 917 "src/jit/x64/emit.dasc"
        }
        //| mov aword WORK[dst], TMP1;
        dasm_put(Dst, 103, Dt23([dst]));
#line 919 "src/jit/x64/emit.dasc"
        break;
    }
    case MVM_OP_null_s: {
        MVMint16 dst = ins->operands[0].reg.orig;
        //| mov qword WORK[dst], 0;
        dasm_put(Dst, 1113, Dt23([dst]));
#line 924 "src/jit/x64/emit.dasc"
        break;
     }
    case MVM_OP_isnull_s: {
        MVMint16 dst = ins->operands[0].reg.orig;
        MVMint16 src = ins->operands[1].reg.orig;
        //| mov TMP1, WORK[src];
        //| test TMP1, TMP1;
        //| setz TMP2b;
        //| movzx TMP2, TMP2b;
        //| mov qword WORK[dst], TMP2;
        dasm_put(Dst, 1122, Dt23([src]), Dt23([dst]));
#line 934 "src/jit/x64/emit.dasc"
        break;
    }
    case MVM_OP_captureposarg: {
        MVMint16 dst = ins->operands[0].reg.orig;
        MVMint16 src = ins->operands[1].reg.orig;
        MVMint16 pos = ins->operands[2].reg.orig;
        //| mov TMP5, qword WORK[src];
        //| test_type_object TMP5;
        //| jnz >1;
        //| cmp_repr_id TMP5, TMP6, MVM_REPR_ID_MVMCallCapture;
        //| jne >1;
        //| mov ARG1, TC;
        //| mov ARG2, aword CAPTURE:TMP5->body.apc;
        //| mov ARG3, WORK[pos];
        //| callp &MVM_args_get_required_pos_obj;
        dasm_put(Dst, 1141, Dt23([src]), DtE(->header.flags), MVM_CF_TYPE_OBJECT, DtE(->st), Dt12(->REPR), Dt13(->ID), MVM_REPR_ID_MVMCallCapture, Dt5(->body.apc), Dt23([pos]));
        dasm_put(Dst, 210, (MVMuint32)((uintptr_t)(&MVM_args_get_required_pos_obj)), (MVMuint32)((uintptr_t)(&MVM_args_get_required_pos_obj) >> 32));
#line 949 "src/jit/x64/emit.dasc"
        //| mov WORK[dst], RV;
        //| jmp >2;
        //|1:
        //| throw_adhoc "captureposarg needs a MVMCallCapture";
        dasm_put(Dst, 291, Dt23([dst]), (unsigned int)((uintptr_t)("captureposarg needs a MVMCallCapture")), (unsigned int)(((uintptr_t)("captureposarg needs a MVMCallCapture"))>>32));
        dasm_put(Dst, 210, (MVMuint32)((uintptr_t)(&MVM_exception_throw_adhoc)), (MVMuint32)((uintptr_t)(&MVM_exception_throw_adhoc) >> 32));
#line 953 "src/jit/x64/emit.dasc"
        //|2:
        dasm_put(Dst, 316);
#line 954 "src/jit/x64/emit.dasc"
        break;
    }
    case MVM_OP_captureposarg_i: {
        MVMint16 dst = ins->operands[0].reg.orig;
        MVMint16 src = ins->operands[1].reg.orig;
        MVMint16 pos = ins->operands[2].reg.orig;
        //| mov TMP5, qword WORK[src];
        //| test_type_object TMP5;
        //| jnz >1;
        //| cmp_repr_id TMP5, TMP6, MVM_REPR_ID_MVMCallCapture;
        //| jne >1;
        //| mov ARG1, TC;
        //| mov ARG2, aword CAPTURE:TMP5->body.apc;
        //| mov ARG3, qword WORK[pos];
        //| callp &MVM_args_get_required_pos_int;
        dasm_put(Dst, 1141, Dt23([src]), DtE(->header.flags), MVM_CF_TYPE_OBJECT, DtE(->st), Dt12(->REPR), Dt13(->ID), MVM_REPR_ID_MVMCallCapture, Dt5(->body.apc), Dt23([pos]));
        dasm_put(Dst, 210, (MVMuint32)((uintptr_t)(&MVM_args_get_required_pos_int)), (MVMuint32)((uintptr_t)(&MVM_args_get_required_pos_int) >> 32));
#line 969 "src/jit/x64/emit.dasc"
        //| mov WORK[dst], RV;
        //| jmp >2;
        //|1:
        //| throw_adhoc "captureposarg_i needs a MVMCallCapture";
        dasm_put(Dst, 291, Dt23([dst]), (unsigned int)((uintptr_t)("captureposarg_i needs a MVMCallCapture")), (unsigned int)(((uintptr_t)("captureposarg_i needs a MVMCallCapture"))>>32));
        dasm_put(Dst, 210, (MVMuint32)((uintptr_t)(&MVM_exception_throw_adhoc)), (MVMuint32)((uintptr_t)(&MVM_exception_throw_adhoc) >> 32));
#line 973 "src/jit/x64/emit.dasc"
        //|2:
        dasm_put(Dst, 316);
#line 974 "src/jit/x64/emit.dasc"
        break;
    }
    case MVM_OP_captureposarg_n: {
        MVMint16 dst = ins->operands[0].reg.orig;
        MVMint16 src = ins->operands[1].reg.orig;
        MVMint16 pos = ins->operands[2].reg.orig;
        //| mov TMP5, qword WORK[src];
        //| test_type_object TMP5;
        //| jnz >1;
        //| cmp_repr_id TMP5, TMP6, MVM_REPR_ID_MVMCallCapture;
        //| jne >1;
        //| mov ARG1, TC;
        //| mov ARG2, aword CAPTURE:TMP5->body.apc;
        //| mov ARG3, qword WORK[pos];
        //| callp &MVM_args_get_pos_num;
        dasm_put(Dst, 1141, Dt23([src]), DtE(->header.flags), MVM_CF_TYPE_OBJECT, DtE(->st), Dt12(->REPR), Dt13(->ID), MVM_REPR_ID_MVMCallCapture, Dt5(->body.apc), Dt23([pos]));
        dasm_put(Dst, 210, (MVMuint32)((uintptr_t)(&MVM_args_get_pos_num)), (MVMuint32)((uintptr_t)(&MVM_args_get_pos_num) >> 32));
#line 989 "src/jit/x64/emit.dasc"
        //| mov WORK[dst], RV;
        //| jmp >2;
        //|1:
        //| throw_adhoc "captureposarg_n needs a MVMCallCapture";
        dasm_put(Dst, 291, Dt23([dst]), (unsigned int)((uintptr_t)("captureposarg_n needs a MVMCallCapture")), (unsigned int)(((uintptr_t)("captureposarg_n needs a MVMCallCapture"))>>32));
        dasm_put(Dst, 210, (MVMuint32)((uintptr_t)(&MVM_exception_throw_adhoc)), (MVMuint32)((uintptr_t)(&MVM_exception_throw_adhoc) >> 32));
#line 993 "src/jit/x64/emit.dasc"
        //|2:
        dasm_put(Dst, 316);
#line 994 "src/jit/x64/emit.dasc"
        break;
    }
    case MVM_OP_captureposarg_s: {
        MVMint16 dst = ins->operands[0].reg.orig;
        MVMint16 src = ins->operands[1].reg.orig;
        MVMint16 pos = ins->operands[2].reg.orig;
        //| mov TMP5, qword WORK[src];
        //| test_type_object TMP5;
        //| jnz >1;
        //| cmp_repr_id TMP5, TMP6, MVM_REPR_ID_MVMCallCapture;
        //| jne >1;
        //| mov ARG1, TC;
        //| mov ARG2, aword CAPTURE:TMP5->body.apc;
        //| mov ARG3, aword WORK[pos];
        //| callp MVM_args_get_required_pos_str;
        dasm_put(Dst, 1141, Dt23([src]), DtE(->header.flags), MVM_CF_TYPE_OBJECT, DtE(->st), Dt12(->REPR), Dt13(->ID), MVM_REPR_ID_MVMCallCapture, Dt5(->body.apc), Dt23([pos]));
        dasm_put(Dst, 210, (MVMuint32)((uintptr_t)(MVM_args_get_required_pos_str)), (MVMuint32)((uintptr_t)(MVM_args_get_required_pos_str) >> 32));
#line 1009 "src/jit/x64/emit.dasc"
        //| mov WORK[dst], RV;
        //| jmp >2;
        //|1:
        //| throw_adhoc "captureposarg_s needs a MVMCallCapture";
        dasm_put(Dst, 291, Dt23([dst]), (unsigned int)((uintptr_t)("captureposarg_s needs a MVMCallCapture")), (unsigned int)(((uintptr_t)("captureposarg_s needs a MVMCallCapture"))>>32));
        dasm_put(Dst, 210, (MVMuint32)((uintptr_t)(&MVM_exception_throw_adhoc)), (MVMuint32)((uintptr_t)(&MVM_exception_throw_adhoc) >> 32));
#line 1013 "src/jit/x64/emit.dasc"
        //|2:
        dasm_put(Dst, 316);
#line 1014 "src/jit/x64/emit.dasc"
        break;
    }
    case MVM_OP_add_i:
    case MVM_OP_sub_i:
    case MVM_OP_bor_i:
    case MVM_OP_band_i:
    case MVM_OP_bxor_i: {
        MVMint32 reg_a = ins->operands[0].reg.orig;
        MVMint32 reg_b = ins->operands[1].reg.orig;
        MVMint32 reg_c = ins->operands[2].reg.orig;

        MVMSpeshFacts *operand_facts = MVM_spesh_get_facts(tc, jg->sg, ins->operands[2]);

        if (reg_a == reg_b) {
            if (operand_facts->flags & MVM_SPESH_FACT_KNOWN_VALUE &&
                fits_in_32_bit(operand_facts->value.i)) {
                MVMint64 value = operand_facts->value.i;
                MVM_jit_log(tc, "accumulator for %s stayed in memory and "
                            " constant value %"PRId64" used\n", ins->info->name, value);
                switch(ins->info->opcode) {
                case MVM_OP_add_i:
                    //| add qword WORK[reg_a], qword value;
                    dasm_put(Dst, 1187, Dt23([reg_a]), value);
#line 1036 "src/jit/x64/emit.dasc"
                    break;
                case MVM_OP_sub_i:
                    //| sub qword WORK[reg_a], qword value;
                    dasm_put(Dst, 1193, Dt23([reg_a]), value);
#line 1039 "src/jit/x64/emit.dasc"
                    break;
                case MVM_OP_bor_i:
                    //| or qword WORK[reg_a], qword value;
                    dasm_put(Dst, 1199, Dt23([reg_a]), value);
#line 1042 "src/jit/x64/emit.dasc"
                    break;
                case MVM_OP_band_i:
                    //| and qword WORK[reg_a], qword value;
                    dasm_put(Dst, 1205, Dt23([reg_a]), value);
#line 1045 "src/jit/x64/emit.dasc"
                    break;
                case MVM_OP_bxor_i:
                    //| xor qword WORK[reg_a], qword value;
                    dasm_put(Dst, 1211, Dt23([reg_a]), value);
#line 1048 "src/jit/x64/emit.dasc"
                    break;
                }
            } else {
                MVM_jit_log(tc, "accumulator for %s stayed in memory\n", ins->info->name);
                //| mov rax, WORK[reg_c];
                dasm_put(Dst, 1217, Dt23([reg_c]));
#line 1053 "src/jit/x64/emit.dasc"
                switch(ins->info->opcode) {
                case MVM_OP_add_i:
                    //| add WORK[reg_a], rax;
                    dasm_put(Dst, 1222, Dt23([reg_a]));
#line 1056 "src/jit/x64/emit.dasc"
                    break;
                case MVM_OP_sub_i:
                    //| sub WORK[reg_a], rax;
                    dasm_put(Dst, 1227, Dt23([reg_a]));
#line 1059 "src/jit/x64/emit.dasc"
                    break;
                case MVM_OP_bor_i:
                    //| or WORK[reg_a], rax;
                    dasm_put(Dst, 1232, Dt23([reg_a]));
#line 1062 "src/jit/x64/emit.dasc"
                    break;
                case MVM_OP_band_i:
                    //| and WORK[reg_a], rax;
                    dasm_put(Dst, 1237, Dt23([reg_a]));
#line 1065 "src/jit/x64/emit.dasc"
                    break;
                case MVM_OP_bxor_i:
                    //| xor WORK[reg_a], rax;
                    dasm_put(Dst, 1242, Dt23([reg_a]));
#line 1068 "src/jit/x64/emit.dasc"
                    break;
                }
            }
        } else {
            if (operand_facts->flags & MVM_SPESH_FACT_KNOWN_VALUE &&
                fits_in_32_bit(operand_facts->value.i)) {
                MVMint64 value = operand_facts->value.i;
                MVM_jit_log(tc, "constant value %"PRId64" used for %s\n",
                            value, ins->info->name);
                //| mov rax, WORK[reg_b];
                dasm_put(Dst, 1217, Dt23([reg_b]));
#line 1078 "src/jit/x64/emit.dasc"
                switch(ins->info->opcode) {
                case MVM_OP_add_i:
                    //| add rax, qword value;
                    dasm_put(Dst, 1247, value);
#line 1081 "src/jit/x64/emit.dasc"
                    break;
                case MVM_OP_sub_i:
                    //| sub rax, qword value;
                    dasm_put(Dst, 1252, value);
#line 1084 "src/jit/x64/emit.dasc"
                    break;
                case MVM_OP_bor_i:
                    //| or rax, qword value;
                    dasm_put(Dst, 1258, value);
#line 1087 "src/jit/x64/emit.dasc"
                    break;
                case MVM_OP_band_i:
                    //| and rax, qword value;
                    dasm_put(Dst, 1263, value);
#line 1090 "src/jit/x64/emit.dasc"
                    break;
                case MVM_OP_bxor_i:
                    //| xor rax, qword value;
                    dasm_put(Dst, 1268, value);
#line 1093 "src/jit/x64/emit.dasc"
                    break;
                }
                //| mov WORK[reg_a], rax;
                dasm_put(Dst, 506, Dt23([reg_a]));
#line 1096 "src/jit/x64/emit.dasc"
            } else {
                //| mov rax, WORK[reg_b];
                dasm_put(Dst, 1217, Dt23([reg_b]));
#line 1098 "src/jit/x64/emit.dasc"
                switch(ins->info->opcode) {
                case MVM_OP_add_i:
                    //| add rax, WORK[reg_c];
                    dasm_put(Dst, 1274, Dt23([reg_c]));
#line 1101 "src/jit/x64/emit.dasc"
                    break;
                case MVM_OP_sub_i:
                    //| sub rax, WORK[reg_c];
                    dasm_put(Dst, 1279, Dt23([reg_c]));
#line 1104 "src/jit/x64/emit.dasc"
                    break;
                case MVM_OP_bor_i:
                    //| or rax, WORK[reg_c];
                    dasm_put(Dst, 1284, Dt23([reg_c]));
#line 1107 "src/jit/x64/emit.dasc"
                    break;
                case MVM_OP_band_i:
                    //| and rax, WORK[reg_c];
                    dasm_put(Dst, 1289, Dt23([reg_c]));
#line 1110 "src/jit/x64/emit.dasc"
                    break;
                case MVM_OP_bxor_i:
                    //| xor rax, WORK[reg_c];
                    dasm_put(Dst, 1294, Dt23([reg_c]));
#line 1113 "src/jit/x64/emit.dasc"
                    break;
                }
                //| mov WORK[reg_a], rax;
                dasm_put(Dst, 506, Dt23([reg_a]));
#line 1116 "src/jit/x64/emit.dasc"
            }
        }
        break;
    }
    case MVM_OP_mul_i:
    case MVM_OP_blshift_i:
    case MVM_OP_brshift_i: {
        MVMint32 reg_a = ins->operands[0].reg.orig;
        MVMint32 reg_b = ins->operands[1].reg.orig;
        MVMint32 reg_c = ins->operands[2].reg.orig;
        //| mov rax, WORK[reg_b];
        dasm_put(Dst, 1217, Dt23([reg_b]));
#line 1127 "src/jit/x64/emit.dasc"
        switch(ins->info->opcode) {
        case MVM_OP_mul_i:
            //| imul rax, WORK[reg_c];
            dasm_put(Dst, 1299, Dt23([reg_c]));
#line 1130 "src/jit/x64/emit.dasc"
            break;
        case MVM_OP_blshift_i:
            //| mov cl, byte WORK[reg_c];
            //| shl rax, cl;
            dasm_put(Dst, 1305, Dt23([reg_c]));
#line 1134 "src/jit/x64/emit.dasc"
            break;
        case MVM_OP_brshift_i:
            //| mov cl, byte WORK[reg_c];
            //| shr rax, cl;
            dasm_put(Dst, 1312, Dt23([reg_c]));
#line 1138 "src/jit/x64/emit.dasc"
            break;
        }
        //| mov WORK[reg_a], rax;
        dasm_put(Dst, 506, Dt23([reg_a]));
#line 1141 "src/jit/x64/emit.dasc"
        break;
    }
    case MVM_OP_pow_i: {
        MVMint16 dst  = ins->operands[0].reg.orig;
        MVMint16 base = ins->operands[1].reg.orig;
        MVMint16 exp  = ins->operands[2].reg.orig;
        //| xor rax, rax;
        //| mov rcx, WORK[exp];
        //| cmp rcx, rax;
        //| jl >3;
        //| inc rax;
        //| mov r8, WORK[base];
        //|1:
        //| test rcx, 1;
        //| jz >2;
        //| imul r8;
        //|2:
        //| imul r8, r8;
        //| shr rcx, 1;
        //| jnz <1;
        //|3:
        //| mov WORK[dst], rax;
        dasm_put(Dst, 1320, Dt23([exp]), Dt23([base]), Dt23([dst]));
#line 1163 "src/jit/x64/emit.dasc"
        break;
    }
    case MVM_OP_div_i: {
        MVMint16 dst = ins->operands[0].reg.orig;
        MVMint16 a   = ins->operands[1].reg.orig;
        MVMint16 b   = ins->operands[2].reg.orig;
        //| mov rax, WORK[a];
        //| mov rcx, WORK[b];
        //| cmp rcx, 0;
        //| jnz >1;
        //| throw_adhoc "Division by zero";
        dasm_put(Dst, 1382, Dt23([a]), Dt23([b]), (unsigned int)((uintptr_t)("Division by zero")), (unsigned int)(((uintptr_t)("Division by zero"))>>32));
        dasm_put(Dst, 210, (MVMuint32)((uintptr_t)(&MVM_exception_throw_adhoc)), (MVMuint32)((uintptr_t)(&MVM_exception_throw_adhoc) >> 32));
#line 1174 "src/jit/x64/emit.dasc"
        //|1:
        dasm_put(Dst, 1409);
#line 1175 "src/jit/x64/emit.dasc"
        /* either num < 0, or denom < 0, but not both */
        //| setl dh;
        //| cmp rax, 0;
        //| setl dl;
        //| xor dl, dh;
        //| movzx r8d, dl;
        //| cqo;
        //| idiv rcx;
        //| test rdx, rdx;
        //| setnz cl;
        //| and r8b, cl;
        dasm_put(Dst, 1417);
#line 1186 "src/jit/x64/emit.dasc"
        /* r8 = bias = (modulo != 0) & ((num < 0) ^ (denom < 0)) */
        //| sub rax, r8;
        //| mov WORK[dst], rax;
        dasm_put(Dst, 1452, Dt23([dst]));
#line 1189 "src/jit/x64/emit.dasc"
        break;
    }
    case MVM_OP_mod_i: {
        MVMint16 dst = ins->operands[0].reg.orig;
        MVMint16 a   = ins->operands[1].reg.orig;
        MVMint16 b   = ins->operands[2].reg.orig;
        //| mov rax, WORK[a];
        //| mov rcx, WORK[b];
        //| cmp rcx, 0;
        //| jnz >1;
        //| throw_adhoc "Division by zero";
        dasm_put(Dst, 1382, Dt23([a]), Dt23([b]), (unsigned int)((uintptr_t)("Division by zero")), (unsigned int)(((uintptr_t)("Division by zero"))>>32));
        dasm_put(Dst, 210, (MVMuint32)((uintptr_t)(&MVM_exception_throw_adhoc)), (MVMuint32)((uintptr_t)(&MVM_exception_throw_adhoc) >> 32));
#line 1200 "src/jit/x64/emit.dasc"
        //|1:
        //| cqo;
        //| idiv rcx;
        //| mov WORK[dst], rdx;
        dasm_put(Dst, 1460, Dt23([dst]));
#line 1204 "src/jit/x64/emit.dasc"
        break;
    }
    case MVM_OP_inc_i: {
         MVMint32 reg = ins->operands[0].reg.orig;
         //| add qword WORK[reg], 1;
         dasm_put(Dst, 1479, Dt23([reg]));
#line 1209 "src/jit/x64/emit.dasc"
         break;
    }
    case MVM_OP_dec_i: {
        MVMint32 reg = ins->operands[0].reg.orig;
        //| sub qword WORK[reg], 1;
        dasm_put(Dst, 1485, Dt23([reg]));
#line 1214 "src/jit/x64/emit.dasc"
        break;
    }
    case MVM_OP_bnot_i: {
        MVMint16 dst = ins->operands[0].reg.orig;
        MVMint16 src = ins->operands[1].reg.orig;
        //| mov TMP1, WORK[src];
        //| not TMP1;
        //| mov WORK[dst], TMP1;
        dasm_put(Dst, 1491, Dt23([src]), Dt23([dst]));
#line 1222 "src/jit/x64/emit.dasc"
        break;
    }
    case MVM_OP_neg_i: {
        MVMint16 dst = ins->operands[0].reg.orig;
        MVMint16 src = ins->operands[1].reg.orig;
        //| mov TMP1, WORK[src];
        //| neg TMP1;
        //| mov WORK[dst], TMP1;
        dasm_put(Dst, 1504, Dt23([src]), Dt23([dst]));
#line 1230 "src/jit/x64/emit.dasc"
        break;
    }
    case MVM_OP_extend_i32: {
        MVMint16 dst = ins->operands[0].reg.orig;
        MVMint16 src = ins->operands[1].reg.orig;
        //| mov RV, WORK[src];
        //| cdqe
        //| mov WORK[dst], RV;
        dasm_put(Dst, 1517, Dt23([src]), Dt23([dst]));
#line 1238 "src/jit/x64/emit.dasc"
        break;
    }
    case MVM_OP_trunc_i16: {
        MVMint16 dst = ins->operands[0].reg.orig;
        MVMint16 src = ins->operands[1].reg.orig;
        //| mov TMP1, WORK[src];
        dasm_put(Dst, 1528, Dt23([src]));
#line 1244 "src/jit/x64/emit.dasc"
        /* x86-64 auto-truncates the upper 48 bits when using registers in 16
         * bit mode */
        //| mov TMP2w, TMP1w;
        //| mov WORK[dst], TMP2;
        dasm_put(Dst, 1533, Dt23([dst]));
#line 1248 "src/jit/x64/emit.dasc"
        break;
    }
    case MVM_OP_trunc_i32: {
        MVMint16 dst = ins->operands[0].reg.orig;
        MVMint16 src = ins->operands[1].reg.orig;
        //| mov TMP1, WORK[src];
        dasm_put(Dst, 1528, Dt23([src]));
#line 1254 "src/jit/x64/emit.dasc"
        /* x86-64 auto-truncates the upper 32 bits when using registers in 32
         * bit mode */
        //| mov TMP2d, TMP1d;
        //| mov WORK[dst], TMP2;
        dasm_put(Dst, 1534, Dt23([dst]));
#line 1258 "src/jit/x64/emit.dasc"
        break;
    }
    case MVM_OP_add_n:
    case MVM_OP_sub_n:
    case MVM_OP_mul_n:
    case MVM_OP_div_n: {
        MVMint16 reg_a = ins->operands[0].reg.orig;
        MVMint16 reg_b = ins->operands[1].reg.orig;
        MVMint16 reg_c = ins->operands[2].reg.orig;
        /* Copying data to xmm (floating point) registers requires
         * a special move instruction */
        //| movsd xmm0, qword WORK[reg_b];
        dasm_put(Dst, 1541, Dt23([reg_b]));
#line 1270 "src/jit/x64/emit.dasc"
        switch(ins->info->opcode) {
        case MVM_OP_add_n:
            //| addsd xmm0, qword WORK[reg_c];
            dasm_put(Dst, 1548, Dt23([reg_c]));
#line 1273 "src/jit/x64/emit.dasc"
            break;
        case MVM_OP_sub_n:
            //| subsd xmm0, qword WORK[reg_c];
            dasm_put(Dst, 1555, Dt23([reg_c]));
#line 1276 "src/jit/x64/emit.dasc"
            break;
        case MVM_OP_mul_n:
            //| mulsd xmm0, qword WORK[reg_c];
            dasm_put(Dst, 1562, Dt23([reg_c]));
#line 1279 "src/jit/x64/emit.dasc"
            break;
        case MVM_OP_div_n:
            //| divsd xmm0, qword WORK[reg_c];
            dasm_put(Dst, 1569, Dt23([reg_c]));
#line 1282 "src/jit/x64/emit.dasc"
            break;
        }
        //| movsd qword WORK[reg_a], xmm0;
        dasm_put(Dst, 1576, Dt23([reg_a]));
#line 1285 "src/jit/x64/emit.dasc"
        break;
    }
    case MVM_OP_coerce_in: {
        MVMint16 dst = ins->operands[0].reg.orig;
        MVMint16 src = ins->operands[1].reg.orig;
        /* convert simple integer to double precision */
        //| cvtsi2sd xmm0, qword WORK[src];
        //| movsd qword WORK[dst], xmm0;
        dasm_put(Dst, 1583, Dt23([src]), Dt23([dst]));
#line 1293 "src/jit/x64/emit.dasc"
        break;
    }
    case MVM_OP_coerce_ni: {
        MVMint16 dst = ins->operands[0].reg.orig;
        MVMint16 src = ins->operands[1].reg.orig;
        /* convert double precision to simple intege */
        //| cvttsd2si rax, qword WORK[src];
        //| mov WORK[dst], rax;
        dasm_put(Dst, 1597, Dt23([src]), Dt23([dst]));
#line 1301 "src/jit/x64/emit.dasc"
        break;
    }
    case MVM_OP_neg_n: {
        /* Negation is xor-ing the highest byte. Pretty simple right */
        MVMint16 dst = ins->operands[0].reg.orig;
        MVMint16 src = ins->operands[1].reg.orig;
        //| mov TMP1, 1;
        //| sal TMP1, 63;
        //| mov TMP2, qword WORK[src];
        //| xor TMP2, TMP1;
        //| mov qword WORK[dst], TMP2;
        dasm_put(Dst, 1609, Dt23([src]), Dt23([dst]));
#line 1312 "src/jit/x64/emit.dasc"
        break;
    }
    case MVM_OP_eq_i:
    case MVM_OP_eqaddr:
    case MVM_OP_ne_i:
    case MVM_OP_lt_i:
    case MVM_OP_le_i:
    case MVM_OP_gt_i:
    case MVM_OP_ge_i: {
        MVMint32 reg_a = ins->operands[0].reg.orig;
        MVMint32 reg_b = ins->operands[1].reg.orig;
        MVMint32 reg_c = ins->operands[2].reg.orig;
        //| mov rax, WORK[reg_b];
        dasm_put(Dst, 1217, Dt23([reg_b]));
#line 1325 "src/jit/x64/emit.dasc"
        /* comparison result in the setting bits in the rflags register */
        //| cmp rax, WORK[reg_c];
        dasm_put(Dst, 1632, Dt23([reg_c]));
#line 1327 "src/jit/x64/emit.dasc"
        /* copy the right comparison bit to the lower byte of the rax
           register */
        switch(ins->info->opcode) {
        case MVM_OP_eqaddr:
        case MVM_OP_eq_i:
            //| sete al;
            dasm_put(Dst, 1637);
#line 1333 "src/jit/x64/emit.dasc"
            break;
        case MVM_OP_ne_i:
            //| setne al;
            dasm_put(Dst, 1641);
#line 1336 "src/jit/x64/emit.dasc"
            break;
        case MVM_OP_lt_i:
            //| setl al;
            dasm_put(Dst, 1645);
#line 1339 "src/jit/x64/emit.dasc"
            break;
        case MVM_OP_le_i:
            //| setle al;
            dasm_put(Dst, 1649);
#line 1342 "src/jit/x64/emit.dasc"
            break;
        case MVM_OP_gt_i:
            //| setg al;
            dasm_put(Dst, 1653);
#line 1345 "src/jit/x64/emit.dasc"
            break;
        case MVM_OP_ge_i:
            //| setge al;
            dasm_put(Dst, 1657);
#line 1348 "src/jit/x64/emit.dasc"
            break;
        }
        /* zero extend al (lower byte) to rax (whole register) */
        //| movzx rax, al;
        //| mov WORK[reg_a], rax;
        dasm_put(Dst, 1661, Dt23([reg_a]));
#line 1353 "src/jit/x64/emit.dasc"
        break;
    }
    case MVM_OP_cmp_i : {
        MVMint32 reg_a = ins->operands[0].reg.orig;
        MVMint32 reg_b = ins->operands[1].reg.orig;
        MVMint32 reg_c = ins->operands[2].reg.orig;
        //| mov TMP1, WORK[reg_b];
        dasm_put(Dst, 1528, Dt23([reg_b]));
#line 1360 "src/jit/x64/emit.dasc"
        /* comparison result in the setting bits in the rflags register */
        //| cmp TMP1, WORK[reg_c];
        dasm_put(Dst, 1670, Dt23([reg_c]));
#line 1362 "src/jit/x64/emit.dasc"
        /* copy the right comparison bit to the lower byte of the rax
           register */
        //| setg TMP2b;
        //| movzx TMP2, TMP2b;
        //| setl TMP3b;
        //| movzx TMP3, TMP3b;
        //| sub TMP2, TMP3;
        //| mov WORK[reg_a], TMP2;
        dasm_put(Dst, 1675, Dt23([reg_a]));
#line 1370 "src/jit/x64/emit.dasc"
        break;
    }
    case MVM_OP_gt_s:
    case MVM_OP_ge_s:
    case MVM_OP_lt_s:
    case MVM_OP_le_s: {
        /* src/jit/graph.c already put a call to the MVM_string_compare
           function into the graph, so here we just have to deal with the
           returned integers. */
        MVMint32 reg = ins->operands[0].reg.orig;
        switch(ins->info->opcode) {
            case MVM_OP_gt_s:
                //| mov TMP2, 1;
                dasm_put(Dst, 1698);
#line 1383 "src/jit/x64/emit.dasc"
                break;
            case MVM_OP_lt_s:
                //| mov TMP2, -1;
                dasm_put(Dst, 1706);
#line 1386 "src/jit/x64/emit.dasc"
                break;
            case MVM_OP_ge_s: case MVM_OP_le_s:
                //| mov TMP2, 0;
                dasm_put(Dst, 1718);
#line 1389 "src/jit/x64/emit.dasc"
                break;
        }
        //| cmp TMP2, WORK[reg];
        dasm_put(Dst, 1726, Dt23([reg]));
#line 1392 "src/jit/x64/emit.dasc"
        /* Mind the reversedness of the constant and the value as compared to
         * interp.c */
        switch(ins->info->opcode) {
            case MVM_OP_gt_s:
                //| sete al;
                dasm_put(Dst, 1637);
#line 1397 "src/jit/x64/emit.dasc"
                break;
            case MVM_OP_ge_s:
                //| setle al;
                dasm_put(Dst, 1649);
#line 1400 "src/jit/x64/emit.dasc"
                break;
            case MVM_OP_lt_s:
                //| sete al;
                dasm_put(Dst, 1637);
#line 1403 "src/jit/x64/emit.dasc"
                break;
            case MVM_OP_le_s:
                //| setge al;
                dasm_put(Dst, 1657);
#line 1406 "src/jit/x64/emit.dasc"
                break;
        }
        //| movzx rax, al;
        //| mov WORK[reg], rax;
        dasm_put(Dst, 1661, Dt23([reg]));
#line 1410 "src/jit/x64/emit.dasc"
        break;
    }
    case MVM_OP_not_i: {
        MVMint16 dst = ins->operands[0].reg.orig;
        MVMint16 src = ins->operands[1].reg.orig;
        //| mov TMP1, WORK[src];
        //| test TMP1, TMP1;
        //| setz TMP2b;
        //| movzx TMP2, TMP2b;
        //| mov WORK[dst], TMP2;
        dasm_put(Dst, 1122, Dt23([src]), Dt23([dst]));
#line 1420 "src/jit/x64/emit.dasc"
        break;
    }
    case MVM_OP_eq_n:
    case MVM_OP_ne_n:
    case MVM_OP_le_n:
    case MVM_OP_lt_n:
    case MVM_OP_ge_n:
    case MVM_OP_gt_n: {
        MVMint16 dst = ins->operands[0].reg.orig;
        MVMint16 a   = ins->operands[1].reg.orig;
        MVMint16 b   = ins->operands[2].reg.orig;
        if (op == MVM_OP_eq_n) {
            //| mov TMP1, 0;
            dasm_put(Dst, 1731);
#line 1433 "src/jit/x64/emit.dasc"
        } else if (op == MVM_OP_ne_n) {
            //| mov TMP1, 1;
            dasm_put(Dst, 1739);
#line 1435 "src/jit/x64/emit.dasc"
        }
        if (op == MVM_OP_lt_n || op == MVM_OP_le_n) {
            //| movsd xmm0, qword WORK[b];
            //| ucomisd xmm0, qword WORK[a];
            dasm_put(Dst, 1747, Dt23([b]), Dt23([a]));
#line 1439 "src/jit/x64/emit.dasc"
        } else {
            //| movsd xmm0, qword WORK[a];
            //| ucomisd xmm0, qword WORK[b];
            dasm_put(Dst, 1747, Dt23([a]), Dt23([b]));
#line 1442 "src/jit/x64/emit.dasc"
        }

        if (op == MVM_OP_le_n || op == MVM_OP_ge_n) {
            //| setae TMP1b;
            dasm_put(Dst, 1759);
#line 1446 "src/jit/x64/emit.dasc"
        } else if (op == MVM_OP_eq_n) {
            //| setnp TMP2b; // zero if either is NaN, 1 otherwise
            //| cmove TMP1, TMP2; // if equal, overwrite 0 with 1
            dasm_put(Dst, 1763);
#line 1449 "src/jit/x64/emit.dasc"
        } else if (op == MVM_OP_ne_n) {
            //| setp TMP2b; // 1 if either is NaN (in which case they can't be equal)
            //| cmove TMP1, TMP2; // if equal, overwrite 1 with IsNan(a) | IsNaN(b)
            dasm_put(Dst, 1771);
#line 1452 "src/jit/x64/emit.dasc"
        } else {
            //| seta TMP1b;
            dasm_put(Dst, 1779);
#line 1454 "src/jit/x64/emit.dasc"
        }
        //| movzx TMP1, TMP1b;
        //| mov WORK[dst], TMP1;
        dasm_put(Dst, 1783, Dt23([dst]));
#line 1457 "src/jit/x64/emit.dasc"
        break;
    }
    case MVM_OP_cmp_n: {
        MVMint16 dst = ins->operands[0].reg.orig;
        MVMint16 a   = ins->operands[1].reg.orig;
        MVMint16 b   = ins->operands[2].reg.orig;
        //| movsd xmm0, qword WORK[a];
        //| movsd xmm1, qword WORK[b];
        //| ucomisd xmm0, xmm1
        //| seta TMP1b;
        //| movzx rax, TMP1b;
        //| ucomisd xmm1, xmm0
        //| seta TMP1b;
        //| movzx TMP1, TMP1b;
        //| sub rax, TMP1;
        //| mov WORK[dst], rax;
        dasm_put(Dst, 1792, Dt23([a]), Dt23([b]), Dt23([dst]));
#line 1473 "src/jit/x64/emit.dasc"
        break;
    }
    case MVM_OP_eq_I:
    case MVM_OP_ne_I:
    case MVM_OP_lt_I:
    case MVM_OP_le_I:
    case MVM_OP_gt_I:
    case MVM_OP_ge_I: {
        MVMint32 reg_a = ins->operands[0].reg.orig;
        MVMint32 reg_b = ins->operands[1].reg.orig;
        MVMint32 reg_c = ins->operands[2].reg.orig;
        /* Call the bigint comparison function. */
        //| mov ARG1, tc;
        //| mov ARG2, WORK[reg_b];
        //| mov ARG3, WORK[reg_c];
        //| callp &MVM_bigint_cmp;
        dasm_put(Dst, 1834, tc, Dt23([reg_b]), Dt23([reg_c]));
        dasm_put(Dst, 210, (MVMuint32)((uintptr_t)(&MVM_bigint_cmp)), (MVMuint32)((uintptr_t)(&MVM_bigint_cmp) >> 32));
        dasm_put(Dst, 216);
#line 1489 "src/jit/x64/emit.dasc"
        /* Handle result by opcode. */
        switch(ins->info->opcode) {
        case MVM_OP_eq_I:
            //| cmp RV, MP_EQ
            //| sete al;
            dasm_put(Dst, 1848, MP_EQ);
#line 1494 "src/jit/x64/emit.dasc"
            break;
        case MVM_OP_ne_I:
            //| cmp RV, MP_EQ
            //| setne al;
            dasm_put(Dst, 1857, MP_EQ);
#line 1498 "src/jit/x64/emit.dasc"
            break;
        case MVM_OP_lt_I:
            //| cmp RV, MP_LT
            //| sete al;
            dasm_put(Dst, 1848, MP_LT);
#line 1502 "src/jit/x64/emit.dasc"
            break;
        case MVM_OP_le_I:
            //| cmp RV, MP_GT
            //| setne al;
            dasm_put(Dst, 1857, MP_GT);
#line 1506 "src/jit/x64/emit.dasc"
            break;
        case MVM_OP_gt_I:
            //| cmp RV, MP_GT
            //| sete al;
            dasm_put(Dst, 1848, MP_GT);
#line 1510 "src/jit/x64/emit.dasc"
            break;
        case MVM_OP_ge_I:
            //| cmp RV, MP_LT
            //| setne al;
            dasm_put(Dst, 1857, MP_LT);
#line 1514 "src/jit/x64/emit.dasc"
            break;
        }
        /* zero extend al (lower byte) to rax (whole register) */
        //| movzx rax, al;
        //| mov WORK[reg_a], rax;
        dasm_put(Dst, 1661, Dt23([reg_a]));
#line 1519 "src/jit/x64/emit.dasc"
        break;
    }
    case MVM_OP_isint:
    case MVM_OP_isnum:
    case MVM_OP_isstr:
    case MVM_OP_islist:
    case MVM_OP_ishash: {
        MVMint16 dst = ins->operands[0].reg.orig;
        MVMint16 obj = ins->operands[1].reg.orig;
        MVMint32 reprid = op == MVM_OP_isint ? MVM_REPR_ID_P6int :
                          op == MVM_OP_isnum ? MVM_REPR_ID_P6num :
                          op == MVM_OP_isstr ? MVM_REPR_ID_P6str :
                          op == MVM_OP_islist ? MVM_REPR_ID_VMArray :
                     /*  op == MVM_OP_ishash */ MVM_REPR_ID_MVMHash;
        //| mov TMP1, aword WORK[obj];
        //| test TMP1, TMP1;
        //| jz >1;
        //| mov TMP1, OBJECT:TMP1->st;
        //| mov TMP1, STABLE:TMP1->REPR;
        //| cmp qword REPR:TMP1->ID, reprid;
        //| jne >1;
        //| mov qword WORK[dst], 1;
        //| jmp >2;
        //|1:
        //| mov qword WORK[dst], 0;
        //|2:
        dasm_put(Dst, 1866, Dt23([obj]), DtE(->st), Dt12(->REPR), Dt13(->ID), reprid, Dt23([dst]), Dt23([dst]));
#line 1545 "src/jit/x64/emit.dasc"
        break;
    }
    case MVM_OP_sp_boolify_iter_arr: {
        MVMint16 dst = ins->operands[0].reg.orig;
        MVMint16 obj = ins->operands[1].reg.orig;
        //| mov TMP1, aword WORK[obj];
        //| mov TMP2, MVMITER:TMP1->body.array_state.index;
        //| add TMP2, 1;
        //| mov TMP3, MVMITER:TMP1->body.array_state.limit;
        dasm_put(Dst, 1919, Dt23([obj]), DtB(->body.array_state.index), DtB(->body.array_state.limit));
#line 1554 "src/jit/x64/emit.dasc"
        /* index - limit will give a carry flag when index < limit */
        //| cmp TMP2, TMP3;
        //| setl TMP1b;
        //| movzx TMP1, TMP1b;
        //| mov aword WORK[dst], TMP1;
        dasm_put(Dst, 1936, Dt23([dst]));
#line 1559 "src/jit/x64/emit.dasc"
        break;
    }
    case MVM_OP_sp_boolify_iter_hash: {
        MVMint16 dst = ins->operands[0].reg.orig;
        MVMint16 obj = ins->operands[1].reg.orig;
        //| mov TMP1, aword WORK[obj];
        //| mov TMP2, MVMITER:TMP1->body.hash_state.next;
        //| test TMP2, TMP2;
        //| setnz TMP2b;
        //| movzx TMP2, TMP2b;
        //| mov aword WORK[dst], TMP2;
        dasm_put(Dst, 1951, Dt23([obj]), DtB(->body.hash_state.next), Dt23([dst]));
#line 1570 "src/jit/x64/emit.dasc"
        break;
    }
    case MVM_OP_objprimspec: {
        MVMint16 dst  = ins->operands[0].reg.orig;
        MVMint16 type = ins->operands[1].reg.orig;
        //| mov TMP6, aword WORK[type];
        //| test TMP6, TMP6;
        //| jz >1;
        //| mov ARG1, TC;
        //| mov ARG2, OBJECT:TMP6->st;
        //| mov FUNCTION, STABLE:ARG2->REPR;
        //| mov FUNCTION, REPR:FUNCTION->get_storage_spec;
        //| call FUNCTION;
        //| movzx TMP6, word STORAGESPEC:RV->boxed_primitive;
        //|1:
        //| mov aword WORK[dst], TMP6;
        dasm_put(Dst, 1974, Dt23([type]), DtE(->st), Dt12(->REPR), Dt13(->get_storage_spec), Dt18(->boxed_primitive), Dt23([dst]));
#line 1586 "src/jit/x64/emit.dasc"
        break;
    }
    case MVM_OP_objprimbits: {
        MVMint16 dst  = ins->operands[0].reg.orig;
        MVMint16 type = ins->operands[1].reg.orig;
        //| mov TMP6, aword WORK[type];
        //| test TMP6, TMP6;
        //| jz >1;
        //| mov ARG2, OBJECT:TMP6->st;
        //| mov FUNCTION, STABLE:ARG2->REPR;
        //| mov FUNCTION, REPR:FUNCTION->get_storage_spec;
        //| mov ARG1, TC;
        //| call FUNCTION;
        //| movzx TMP6, word STORAGESPEC:RV->boxed_primitive;
        //| test TMP6, TMP6;
        //| jz >1;
        //| movzx TMP6, word STORAGESPEC:RV->bits;
        //|1:
        //| mov aword WORK[dst], TMP6;
        dasm_put(Dst, 2017, Dt23([type]), DtE(->st), Dt12(->REPR), Dt13(->get_storage_spec), Dt18(->boxed_primitive), Dt18(->bits), Dt23([dst]));
#line 1605 "src/jit/x64/emit.dasc"
        break;
    }
    case MVM_OP_objprimunsigned: {
        MVMint16 dst  = ins->operands[0].reg.orig;
        MVMint16 type = ins->operands[1].reg.orig;
        //| mov TMP5, aword WORK[type];
        //| test TMP5, TMP5;
        //| jz >1;
        //| mov ARG1, TC;
        //| mov ARG2, OBJECT:TMP5->st;
        //| mov FUNCTION, STABLE:ARG2->REPR;
        //| mov FUNCTION, REPR:FUNCTION->get_storage_spec;
        //| call FUNCTION;
        //| mov TMP6, STORAGESPEC:RV->boxed_primitive;
        //| cmp TMP6, 1;
        //| jne >1;
        //| mov TMP6, STORAGESPEC:RV->is_unsigned;
        //| mov WORK[dst], TMP6;
        //| jmp >2;
        //|1:
        //| mov aword WORK[dst], 0;
        //|2:
        dasm_put(Dst, 2072, Dt23([type]), DtE(->st), Dt12(->REPR), Dt13(->get_storage_spec), Dt18(->boxed_primitive), Dt18(->is_unsigned), Dt23([dst]), Dt23([dst]));
#line 1627 "src/jit/x64/emit.dasc"
        break;
    }
    case MVM_OP_isnonnull: {
        MVMint16 dst = ins->operands[0].reg.orig;
        MVMint16 obj = ins->operands[1].reg.orig;
        //| mov TMP1, WORK[obj];
        //| test TMP1, TMP1;
        //| setnz TMP2b;
        //| get_vmnull TMP3;
        //| cmp TMP1, TMP3;
        //| setne TMP3b;
        //| and TMP2b, TMP3b;
        //| movzx TMP2, TMP2b;
        //| mov WORK[dst], TMP2;
        dasm_put(Dst, 2141, Dt23([obj]), Dt22(->instance), DtC(->VMNull), Dt23([dst]));
#line 1641 "src/jit/x64/emit.dasc"
        break;
    }
    case MVM_OP_scgethandle: {
        MVMint16 dst = ins->operands[0].reg.orig;
        MVMint16 sc  = ins->operands[1].reg.orig;
        //| mov TMP5, aword WORK[sc];
        //| cmp_repr_id TMP5, TMP6, MVM_REPR_ID_SCRef;
        //| je >1;
        //| throw_adhoc "Must provide an SCRef operand to scgethandle"
        dasm_put(Dst, 2178, Dt23([sc]), DtE(->st), Dt12(->REPR), Dt13(->ID), MVM_REPR_ID_SCRef, (unsigned int)((uintptr_t)("Must provide an SCRef operand to scgethandle")), (unsigned int)(((uintptr_t)("Must provide an SCRef operand to scgethandle"))>>32));
        dasm_put(Dst, 210, (MVMuint32)((uintptr_t)(&MVM_exception_throw_adhoc)), (MVMuint32)((uintptr_t)(&MVM_exception_throw_adhoc) >> 32));
#line 1650 "src/jit/x64/emit.dasc"
        //|1:
        //| mov ARG1, TC;
        //| mov ARG2, SCREF:TMP5;
        //| callp &MVM_sc_get_handle;
        dasm_put(Dst, 2209);
        dasm_put(Dst, 210, (MVMuint32)((uintptr_t)(&MVM_sc_get_handle)), (MVMuint32)((uintptr_t)(&MVM_sc_get_handle) >> 32));
#line 1654 "src/jit/x64/emit.dasc"
        //| mov WORK[dst], RV;
        dasm_put(Dst, 501, Dt23([dst]));
#line 1655 "src/jit/x64/emit.dasc"
        break;
    }
    case MVM_OP_scobjcount: {
        MVMint16 dst = ins->operands[0].reg.orig;
        MVMint16 sc  = ins->operands[1].reg.orig;
        //| mov TMP5, aword WORK[dst];
        //| cmp_repr_id TMP5, TMP6, MVM_REPR_ID_SCRef;
        //| je >1;
        //| throw_adhoc "Must provide an SCRef operand to scobjcount"
        dasm_put(Dst, 2178, Dt23([dst]), DtE(->st), Dt12(->REPR), Dt13(->ID), MVM_REPR_ID_SCRef, (unsigned int)((uintptr_t)("Must provide an SCRef operand to scobjcount")), (unsigned int)(((uintptr_t)("Must provide an SCRef operand to scobjcount"))>>32));
        dasm_put(Dst, 210, (MVMuint32)((uintptr_t)(&MVM_exception_throw_adhoc)), (MVMuint32)((uintptr_t)(&MVM_exception_throw_adhoc) >> 32));
#line 1664 "src/jit/x64/emit.dasc"
        //|1:
        //| mov ARG1, TC;
        //| mov ARG2, SCREF:TMP5;
        //| callp &MVM_sc_get_object_count;
        dasm_put(Dst, 2209);
        dasm_put(Dst, 210, (MVMuint32)((uintptr_t)(&MVM_sc_get_object_count)), (MVMuint32)((uintptr_t)(&MVM_sc_get_object_count) >> 32));
#line 1668 "src/jit/x64/emit.dasc"
        //| mov WORK[dst], RV;
        dasm_put(Dst, 501, Dt23([dst]));
#line 1669 "src/jit/x64/emit.dasc"
        break;
    }
    case MVM_OP_setobjsc: {
        MVMint16 dst = ins->operands[0].reg.orig;
        MVMint16 sc  = ins->operands[1].reg.orig;
        //| mov TMP5, WORK[sc];
        //| cmp_repr_id TMP5, TMP6, MVM_REPR_ID_SCRef;
        //| je >1;
        //| throw_adhoc "Must provide an SCRef operand to setobjsc"
        dasm_put(Dst, 2178, Dt23([sc]), DtE(->st), Dt12(->REPR), Dt13(->ID), MVM_REPR_ID_SCRef, (unsigned int)((uintptr_t)("Must provide an SCRef operand to setobjsc")), (unsigned int)(((uintptr_t)("Must provide an SCRef operand to setobjsc"))>>32));
        dasm_put(Dst, 210, (MVMuint32)((uintptr_t)(&MVM_exception_throw_adhoc)), (MVMuint32)((uintptr_t)(&MVM_exception_throw_adhoc) >> 32));
#line 1678 "src/jit/x64/emit.dasc"
        //|1:
        //| mov ARG1, TC;
        //| mov ARG2, aword WORK[dst];
        //| mov ARG3, SCREF:TMP5;
        //| callp &MVM_sc_set_obj_sc;
        dasm_put(Dst, 2225, Dt23([dst]));
        dasm_put(Dst, 210, (MVMuint32)((uintptr_t)(&MVM_sc_set_obj_sc)), (MVMuint32)((uintptr_t)(&MVM_sc_set_obj_sc) >> 32));
        dasm_put(Dst, 216);
#line 1683 "src/jit/x64/emit.dasc"
        break;
    }
    case MVM_OP_isnull: {
        MVMint16 dst = ins->operands[0].reg.orig;
        MVMint16 obj = ins->operands[1].reg.orig;
        //| mov TMP1, WORK[obj];
        //| test TMP1, TMP1;
        //| setz TMP2b;
        //| get_vmnull TMP3;
        //| cmp TMP1, TMP3;
        //| sete TMP3b;
        //| or TMP2b, TMP3b;
        //| movzx TMP2, TMP2b;
        //| mov WORK[dst], TMP2;
        dasm_put(Dst, 2245, Dt23([obj]), Dt22(->instance), DtC(->VMNull), Dt23([dst]));
#line 1697 "src/jit/x64/emit.dasc"
        break;
    }
    case MVM_OP_sp_fastcreate: {
        MVMint16 dst       = ins->operands[0].reg.orig;
        MVMuint16 size     = ins->operands[1].lit_i16;
        MVMint16 spesh_idx = ins->operands[2].lit_i16;
        //| mov ARG1, TC;
        //| mov ARG2, size;
        //| callp &MVM_gc_allocate_zeroed;
        dasm_put(Dst, 2282, size);
        dasm_put(Dst, 210, (MVMuint32)((uintptr_t)(&MVM_gc_allocate_zeroed)), (MVMuint32)((uintptr_t)(&MVM_gc_allocate_zeroed) >> 32));
#line 1706 "src/jit/x64/emit.dasc"
        //| get_spesh_slot TMP1, spesh_idx;
        //| mov aword OBJECT:RV->st, TMP1;  // st is 64 bit (pointer)
        //| mov word OBJECT:RV->header.size, size; // object size is 16 bit
        //| mov TMP1d, dword TC->thread_id;  // thread id is 32 bit
        //| mov dword OBJECT:RV->header.owner, TMP1d; // does this even work?
        //| mov aword WORK[dst], RV; // store in local register
        dasm_put(Dst, 2292, Dt22(->cur_frame), Dt2(->effective_spesh_slots), Dt15([spesh_idx]), DtE(->st), DtE(->header.size), size, Dt22(->thread_id), DtE(->header.owner), Dt23([dst]));
#line 1712 "src/jit/x64/emit.dasc"
        break;
    }
    case MVM_OP_decont:
    case MVM_OP_sp_decont: {
        MVMint16 dst = ins->operands[0].reg.orig;
        MVMint16 src = ins->operands[1].reg.orig;
        //| mov TMP5, WORK[src];
        //| test TMP5, TMP5;
        dasm_put(Dst, 2330, Dt23([src]));
#line 1720 "src/jit/x64/emit.dasc"
        // obj is null
        //| jz >1;
        //| test_type_object TMP5;
        dasm_put(Dst, 2338, DtE(->header.flags), MVM_CF_TYPE_OBJECT);
#line 1723 "src/jit/x64/emit.dasc"
        // object is type object (not concrete)
        //| jnz >1;
        //| mov TMP6, OBJECT:TMP5->st;
        //| mov TMP6, STABLE:TMP6->container_spec;
        //| test TMP6, TMP6;
        dasm_put(Dst, 2350, DtE(->st), Dt12(->container_spec));
#line 1728 "src/jit/x64/emit.dasc"
        // container spec is zero
        //| jz >1;
        //| mov ARG1, TC;
        //| mov ARG2, TMP5;      // object
        //| lea ARG3, WORK[dst]; // destination register
        //| mov FUNCTION, CONTAINERSPEC:TMP6->fetch; // get function pointer
        //| call FUNCTION;
        //| jmp >2;
        //|1:
        dasm_put(Dst, 2366, Dt23([dst]), Dt17(->fetch));
#line 1737 "src/jit/x64/emit.dasc"
        // otherwise just move the object into the register
        //| mov WORK[dst], TMP5;
        //|2:
        dasm_put(Dst, 2396, Dt23([dst]));
#line 1740 "src/jit/x64/emit.dasc"
        break;
    }
    case MVM_OP_iscont: {
        MVMint16 dst = ins->operands[0].reg.orig;
        MVMint16 obj = ins->operands[1].reg.orig;
        //| mov TMP1, aword WORK[obj];
        //| test TMP1, TMP1;
        //| jz >1;
        //| mov TMP1, OBJECT:TMP1->st;
        //| mov TMP1, STABLE:TMP1->container_spec;
        //| test TMP1, TMP1;
        //|1:
        //| setnz TMP1b;
        //| movzx TMP1, TMP1b;
        //| mov qword WORK[dst], TMP1;
        dasm_put(Dst, 2403, Dt23([obj]), DtE(->st), Dt12(->container_spec), Dt23([dst]));
#line 1755 "src/jit/x64/emit.dasc"
        break;
    }
    case MVM_OP_sp_findmeth: {
        MVMint16 dst = ins->operands[0].reg.orig;
        MVMint16 obj = ins->operands[1].reg.orig;
        MVMint32 str_idx = ins->operands[2].lit_str_idx;
        MVMuint16 ss_idx = ins->operands[3].lit_i16;
        //| get_spesh_slot TMP1, ss_idx;
        //| mov TMP2, WORK[obj];
        //| mov TMP2, OBJECT:TMP2->st;
        //| cmp TMP1, TMP2;
        //| jne >1;
        //| get_spesh_slot TMP3, ss_idx + 1;
        //| mov WORK[dst], TMP3;
        //| jmp >2;
        //|1:
        dasm_put(Dst, 2439, Dt22(->cur_frame), Dt2(->effective_spesh_slots), Dt15([ss_idx]), Dt23([obj]), DtE(->st), Dt22(->cur_frame), Dt2(->effective_spesh_slots), Dt15([ss_idx + 1]), Dt23([dst]));
#line 1771 "src/jit/x64/emit.dasc"
        /* call find_method_spesh */
        //| mov ARG1, TC;
        //| mov ARG2, WORK[obj];
        //| get_string ARG3, str_idx;
        dasm_put(Dst, 2489, Dt23([obj]));
         MVM_cu_ensure_string_decoded(tc, jg->sg->sf->body.cu, str_idx);
#line 1775 "src/jit/x64/emit.dasc"
        //| mov ARG4, ss_idx;
        //| lea TMP6, WORK[dst];
        //| mov ARG5, TMP6;
        //| callp &MVM_6model_find_method_spesh;
        dasm_put(Dst, 2498, Dt24(->body.strings), Dt15([str_idx]), ss_idx, Dt23([dst]));
        dasm_put(Dst, 210, (MVMuint32)((uintptr_t)(&MVM_6model_find_method_spesh)), (MVMuint32)((uintptr_t)(&MVM_6model_find_method_spesh) >> 32));
#line 1779 "src/jit/x64/emit.dasc"
        //|2:
        dasm_put(Dst, 316);
#line 1780 "src/jit/x64/emit.dasc"
        break;
    }
    case MVM_OP_isconcrete: {
        MVMint16 dst = ins->operands[0].reg.orig;
        MVMint16 obj = ins->operands[1].reg.orig;
        //| mov TMP1, WORK[obj];
        //| test TMP1, TMP1;
        //| jz >1;
        //| test_type_object TMP1;
        //| jnz >1;
        //| mov qword WORK[dst], 1;
        //| jmp >2;
        //|1:
        //| mov qword WORK[dst], 0;
        //|2:
        dasm_put(Dst, 2519, Dt23([obj]), DtE(->header.flags), MVM_CF_TYPE_OBJECT, Dt23([dst]), Dt23([dst]));
#line 1795 "src/jit/x64/emit.dasc"
        break;
    }
    case MVM_OP_isinvokable: {
        MVMint16 dst = ins->operands[0].reg.orig;
        MVMint16 src = ins->operands[1].reg.orig;
        //| mov TMP1, aword WORK[src];
        //| mov TMP1, OBJECT:TMP1->st;
        //| mov TMP2, 1;
        //| mov64 TMP3, ((uintptr_t)(MVM_6model_invoke_default));
        //| cmp TMP3, STABLE:TMP1->invoke;
        //| jne >1;
        //| mov TMP4, STABLE:TMP1->invocation_spec;
        //| test TMP4, TMP4;
        //| jnz >1;
        //| and TMP2, TMP4;
        //|1:
        //| mov aword WORK[dst], TMP2;
        dasm_put(Dst, 2565, Dt23([src]), DtE(->st), (unsigned int)(((uintptr_t)(MVM_6model_invoke_default))), (unsigned int)((((uintptr_t)(MVM_6model_invoke_default)))>>32), Dt12(->invoke), Dt12(->invocation_spec), Dt23([dst]));
#line 1812 "src/jit/x64/emit.dasc"
        break;
    }
    case MVM_OP_takehandlerresult: {
        MVMint16 dst = ins->operands[0].reg.orig;
        //| mov TMP1, aword TC->last_handler_result;
        //| mov aword WORK[dst], TMP1;
        //| mov aword TC->last_handler_result, 0;
        dasm_put(Dst, 2613, Dt22(->last_handler_result), Dt23([dst]), Dt22(->last_handler_result));
#line 1819 "src/jit/x64/emit.dasc"
        break;
    }
    case MVM_OP_exception: {
        MVMint16 dst = ins->operands[0].reg.orig;
        //| mov TMP1, TC->active_handlers;
        //| test TMP1, TMP1;
        //| jz >1;
        //| mov TMP1, MVMACTIVEHANDLERS:TMP1->ex_obj;
        //| mov WORK[dst], TMP1;
        //| jmp >2;
        //|1:
        //| get_vmnull TMP1;
        //| mov WORK[dst], TMP1;
        //|2:
        dasm_put(Dst, 2630, Dt22(->active_handlers), DtD(->ex_obj), Dt23([dst]), Dt22(->instance), DtC(->VMNull), Dt23([dst]));
#line 1833 "src/jit/x64/emit.dasc"
        break;
    }
    case MVM_OP_scwbdisable: {
        MVMint16 dst = ins->operands[0].reg.orig;
        //| mov TMP1d, dword TC->sc_wb_disable_depth;
        //| add TMP1d, 1;
        //| mov dword TC->sc_wb_disable_depth, TMP1d;
        //| mov qword WORK[dst], TMP1;
        dasm_put(Dst, 2670, Dt22(->sc_wb_disable_depth), Dt22(->sc_wb_disable_depth), Dt23([dst]));
#line 1841 "src/jit/x64/emit.dasc"
        break;
    }
    case MVM_OP_scwbenable: {
        MVMint16 dst = ins->operands[0].reg.orig;
        //| mov TMP1d, dword TC->sc_wb_disable_depth; // should do zero-extension
        //| sub TMP1d, 1;
        //| mov dword TC->sc_wb_disable_depth, TMP1d;
        //| mov qword WORK[dst], TMP1;
        dasm_put(Dst, 2686, Dt22(->sc_wb_disable_depth), Dt22(->sc_wb_disable_depth), Dt23([dst]));
#line 1849 "src/jit/x64/emit.dasc"
        break;
    }
    case MVM_OP_assign:
    case MVM_OP_assignunchecked: {
        MVMint16 cont = ins->operands[0].reg.orig;
        MVMint16 obj  = ins->operands[1].reg.orig;
        //| mov ARG2, aword WORK[cont];
        //| mov FUNCTION, OBJECT:ARG2->st;
        //| mov FUNCTION, STABLE:FUNCTION->container_spec;
        //| test FUNCTION, FUNCTION;
        //| jnz >1;
        //| throw_adhoc "Cannot assign to an immutable value";
        dasm_put(Dst, 2703, Dt23([cont]), DtE(->st), Dt12(->container_spec), (unsigned int)((uintptr_t)("Cannot assign to an immutable value")), (unsigned int)(((uintptr_t)("Cannot assign to an immutable value"))>>32));
        dasm_put(Dst, 210, (MVMuint32)((uintptr_t)(&MVM_exception_throw_adhoc)), (MVMuint32)((uintptr_t)(&MVM_exception_throw_adhoc) >> 32));
#line 1861 "src/jit/x64/emit.dasc"
        //|1:
        //| mov ARG1, TC;
        //| mov ARG3, aword WORK[obj];
        dasm_put(Dst, 2732, Dt23([obj]));
#line 1864 "src/jit/x64/emit.dasc"
        if (op == MVM_OP_assign) {
            //| mov FUNCTION, CONTAINERSPEC:FUNCTION->store;
            dasm_put(Dst, 184, Dt17(->store));
#line 1866 "src/jit/x64/emit.dasc"
        } else {
            //| mov FUNCTION, CONTAINERSPEC:FUNCTION->store_unchecked;
            dasm_put(Dst, 184, Dt17(->store_unchecked));
#line 1868 "src/jit/x64/emit.dasc"
        }
        //| call FUNCTION;
        dasm_put(Dst, 2748);
#line 1870 "src/jit/x64/emit.dasc"
        break;
    }
    case MVM_OP_getlexstatic_o:
    case MVM_OP_getlexperinvtype_o: {
        MVMint16 dst  = ins->operands[0].reg.orig;
        MVMint16 name = ins->operands[1].reg.orig;
        //| mov ARG1, TC;
        //| mov ARG2, aword WORK[name];
        //| mov ARG3, MVM_reg_obj;
        //| callp &MVM_frame_find_lexical_by_name;
        dasm_put(Dst, 2753, Dt23([name]), MVM_reg_obj);
        dasm_put(Dst, 210, (MVMuint32)((uintptr_t)(&MVM_frame_find_lexical_by_name)), (MVMuint32)((uintptr_t)(&MVM_frame_find_lexical_by_name) >> 32));
#line 1880 "src/jit/x64/emit.dasc"
        //| test RV, RV;
        //| jz >1;
        //| mov RV, [RV];
        //|1:
        //| mov WORK[dst], RV;
        dasm_put(Dst, 2767, Dt23([dst]));
#line 1885 "src/jit/x64/emit.dasc"
        break;
    }
    case MVM_OP_paramnamesused:
        //| mov ARG2, TC->cur_frame;
        //| lea ARG2, FRAME:ARG2->params;
        //| mov TMP5w, word ARGCTX:ARG2->num_pos;
        //| cmp TMP5w, word ARGCTX:ARG2->arg_count;
        //| je >1;
        //| mov ARG1, TC;
        //| callp &MVM_args_assert_nameds_used;
        dasm_put(Dst, 2789, Dt22(->cur_frame), Dt2(->params), Dt3(->num_pos), Dt3(->arg_count));
        dasm_put(Dst, 210, (MVMuint32)((uintptr_t)(&MVM_args_assert_nameds_used)), (MVMuint32)((uintptr_t)(&MVM_args_assert_nameds_used) >> 32));
#line 1895 "src/jit/x64/emit.dasc"
        //|1:
        dasm_put(Dst, 1409);
#line 1896 "src/jit/x64/emit.dasc"
        break;
    case MVM_OP_assertparamcheck: {
        MVMint16 ok = ins->operands[0].reg.orig;
        //| mov TMP1, qword WORK[ok];
        //| test TMP1, TMP1;
        //| jnz >1;
        //| mov ARG1, TC;
        //| callp &MVM_args_bind_failed;
        dasm_put(Dst, 2817, Dt23([ok]));
        dasm_put(Dst, 210, (MVMuint32)((uintptr_t)(&MVM_args_bind_failed)), (MVMuint32)((uintptr_t)(&MVM_args_bind_failed) >> 32));
#line 1904 "src/jit/x64/emit.dasc"
        //|1:
        dasm_put(Dst, 1409);
#line 1905 "src/jit/x64/emit.dasc"
        break;
    }
    case MVM_OP_prof_enterspesh:
        //| mov ARG1, TC;
        //| mov ARG2, TC->cur_frame;
        //| mov ARG2, aword FRAME:ARG2->static_info;
        //| mov ARG3, aword MVM_PROFILE_ENTER_JIT;
        //| callp &MVM_profile_log_enter;
        dasm_put(Dst, 2834, Dt22(->cur_frame), Dt2(->static_info), MVM_PROFILE_ENTER_JIT);
        dasm_put(Dst, 210, (MVMuint32)((uintptr_t)(&MVM_profile_log_enter)), (MVMuint32)((uintptr_t)(&MVM_profile_log_enter) >> 32));
        dasm_put(Dst, 216);
#line 1913 "src/jit/x64/emit.dasc"
        break;
    case MVM_OP_prof_enterinline: {
        MVMint16 spesh_idx = ins->operands[0].lit_i16;
        //| mov ARG1, TC;
        //| get_spesh_slot ARG2, spesh_idx;
        //| mov ARG3, aword MVM_PROFILE_ENTER_JIT_INLINE;
        //| callp &MVM_profile_log_enter;
        dasm_put(Dst, 2852, Dt22(->cur_frame), Dt2(->effective_spesh_slots), Dt15([spesh_idx]), MVM_PROFILE_ENTER_JIT_INLINE);
        dasm_put(Dst, 210, (MVMuint32)((uintptr_t)(&MVM_profile_log_enter)), (MVMuint32)((uintptr_t)(&MVM_profile_log_enter) >> 32));
        dasm_put(Dst, 216);
#line 1920 "src/jit/x64/emit.dasc"
        break;
    }
    case MVM_OP_getobjsc: {
        MVMint16 dst = ins->operands[0].reg.orig;
        MVMint16 obj = ins->operands[1].reg.orig;
        //| mov TMP1, aword WORK[obj];
        //| mov TMP2d, dword COLLECTABLE:TMP1->sc_forward_u.sc.sc_idx;
        //| xor TMP3, TMP3;
        //| cmp TMP2d, 0;
        //| jle >1;
        //| mov TMP3, aword TC->instance;
        //| mov TMP3, aword MVMINSTANCE:TMP3->all_scs;
        //| mov TMP3, aword [TMP3 + TMP2d * 8];
        //| mov TMP3, SCREFBODY:TMP3->sc;
        //|1:
        //| mov aword WORK[dst], TMP3;
        dasm_put(Dst, 2874, Dt23([obj]), Dt11(->sc_forward_u.sc.sc_idx), Dt22(->instance), DtC(->all_scs), Dt1B(->sc), Dt23([dst]));
#line 1936 "src/jit/x64/emit.dasc"
        break;
    }
    case MVM_OP_invokewithcapture: {
        MVMint16 dest    = ins->operands[0].reg.orig;
        MVMint16 code    = ins->operands[1].reg.orig;
        MVMint16 capture = ins->operands[2].reg.orig;
        //| mov TMP1, aword WORK[capture];
        dasm_put(Dst, 1528, Dt23([capture]));
#line 1943 "src/jit/x64/emit.dasc"
        /* if (IS_CONCRETE(capture) && REPR(capture)->ID == MVM_REPR_ID_MVMCallCapture) */
        //| test_type_object TMP1;
        //| jnz >1;
        //| cmp_repr_id TMP1, TMP2, MVM_REPR_ID_MVMCallCapture;
        //| je >2;
        //|1:
        dasm_put(Dst, 2915, DtE(->header.flags), MVM_CF_TYPE_OBJECT, DtE(->st), Dt12(->REPR), Dt13(->ID), MVM_REPR_ID_MVMCallCapture);
#line 1949 "src/jit/x64/emit.dasc"
        /* else throw */
        //| throw_adhoc "invokewithcapture needs a MVMCallCapture";
        dasm_put(Dst, 306, (unsigned int)((uintptr_t)("invokewithcapture needs a MVMCallCapture")), (unsigned int)(((uintptr_t)("invokewithcapture needs a MVMCallCapture"))>>32));
        dasm_put(Dst, 210, (MVMuint32)((uintptr_t)(&MVM_exception_throw_adhoc)), (MVMuint32)((uintptr_t)(&MVM_exception_throw_adhoc) >> 32));
#line 1951 "src/jit/x64/emit.dasc"
        //|2:
        dasm_put(Dst, 316);
#line 1952 "src/jit/x64/emit.dasc"
        /* code = MVM_frame_find_invokee(tc, code, NULL) */
        //| mov ARG1, TC;
        //| mov ARG2, WORK[code];
        //| xor ARG3, ARG3;
        //| callp &MVM_frame_find_invokee;
        dasm_put(Dst, 2944, Dt23([code]));
        dasm_put(Dst, 210, (MVMuint32)((uintptr_t)(&MVM_frame_find_invokee)), (MVMuint32)((uintptr_t)(&MVM_frame_find_invokee) >> 32));
        dasm_put(Dst, 216);
#line 1957 "src/jit/x64/emit.dasc"

        //| mov ARG2, RV; // ARG2 = code
        dasm_put(Dst, 2957);
#line 1959 "src/jit/x64/emit.dasc"
        /* tc->cur_frame->return_value = &GET_REG(cur_op, 2) */
        //| lea ARG1, WORK[dest]; // ARG1 is used as scratch space
        //| mov TMP6, aword TC->cur_frame;
        //| mov aword FRAME:TMP6->return_value, ARG1;
        dasm_put(Dst, 2961, Dt23([dest]), Dt22(->cur_frame), Dt2(->return_value));
#line 1963 "src/jit/x64/emit.dasc"
        /* tc->cur_frame->return_type = MVM_RETURN_OBJ */
        //| mov byte FRAME:TMP6->return_type, MVM_RETURN_OBJ;
        dasm_put(Dst, 2974, Dt2(->return_type), MVM_RETURN_OBJ);
#line 1965 "src/jit/x64/emit.dasc"
        /* tc->cur_frame->return_address = cur_op */
        //| get_cur_op ARG1;
        //| mov aword FRAME:TMP6->return_address, ARG1;
        dasm_put(Dst, 2980, Dt22(->interp_cur_op), Dt2(->return_address));
#line 1968 "src/jit/x64/emit.dasc"
        /* STABLE(code)->invoke(tc, code, capture->body.apc->effective_callsite,
           capture->body.apc->arg) */
        //| mov ARG1, TC;
        //| mov ARG3, WORK[capture];
        //| mov ARG4, aword CAPTURE:ARG3->body.apc;
        //| mov ARG3, aword ARGCTX:ARG4->callsite;
        //| mov ARG4, aword ARGCTX:ARG4->args;
        //| mov FUNCTION, OBJECT:ARG2->st;
        //| mov FUNCTION, STABLE:FUNCTION->invoke;
        //| call FUNCTION;
        dasm_put(Dst, 2992, Dt23([capture]), Dt5(->body.apc), Dt3(->callsite), Dt3(->args), DtE(->st), Dt12(->invoke));
#line 1978 "src/jit/x64/emit.dasc"
        /* jumping out is handled by invokish */
        break;
    }
    case MVM_OP_captureposelems: {
        MVMint16 dest    = ins->operands[0].reg.orig;
        MVMint16 capture = ins->operands[1].reg.orig;
        //| mov TMP1, aword WORK[capture];
        dasm_put(Dst, 1528, Dt23([capture]));
#line 1985 "src/jit/x64/emit.dasc"
        /* if (IS_CONCRETE(capture) && REPR(capture)->ID == MVM_REPR_ID_MVMCallCapture) */
        //| test_type_object TMP1;
        //| jnz >1;
        //| cmp_repr_id TMP1, TMP2, MVM_REPR_ID_MVMCallCapture;
        //| je >2;
        //|1:
        dasm_put(Dst, 2915, DtE(->header.flags), MVM_CF_TYPE_OBJECT, DtE(->st), Dt12(->REPR), Dt13(->ID), MVM_REPR_ID_MVMCallCapture);
#line 1991 "src/jit/x64/emit.dasc"
        /* else throw */
        //| throw_adhoc "captureposelems needs a concrete MVMCallCapture";
        dasm_put(Dst, 306, (unsigned int)((uintptr_t)("captureposelems needs a concrete MVMCallCapture")), (unsigned int)(((uintptr_t)("captureposelems needs a concrete MVMCallCapture"))>>32));
        dasm_put(Dst, 210, (MVMuint32)((uintptr_t)(&MVM_exception_throw_adhoc)), (MVMuint32)((uintptr_t)(&MVM_exception_throw_adhoc) >> 32));
#line 1993 "src/jit/x64/emit.dasc"
        //|2:
        //| mov TMP2, aword CAPTURE:TMP1->body.apc;
        //| movzx TMP2, word ARGPROCCONTEXT:TMP2->num_pos;
        //| mov WORK[dest], TMP2;
        dasm_put(Dst, 3025, Dt5(->body.apc), Dt7(->num_pos), Dt23([dest]));
#line 1997 "src/jit/x64/emit.dasc"
        break;
    }
    case MVM_OP_captureexistsnamed: {
        MVMint16 dst = ins->operands[0].reg.orig;
        MVMint16 obj = ins->operands[1].reg.orig;
        MVMint16 name = ins->operands[2].reg.orig;
        //| mov TMP1, WORK[obj];
        //| test_type_object TMP1;
        //| jnz >1;
        //| cmp_repr_id TMP1, TMP2, MVM_REPR_ID_MVMCallCapture;
        //| je >2;
        //|1:
        //| throw_adhoc "captureexistsnamed needs a MVMCallCapture";
        dasm_put(Dst, 1028, Dt23([obj]), DtE(->header.flags), MVM_CF_TYPE_OBJECT, DtE(->st), Dt12(->REPR), Dt13(->ID), MVM_REPR_ID_MVMCallCapture, (unsigned int)((uintptr_t)("captureexistsnamed needs a MVMCallCapture")), (unsigned int)(((uintptr_t)("captureexistsnamed needs a MVMCallCapture"))>>32));
        dasm_put(Dst, 210, (MVMuint32)((uintptr_t)(&MVM_exception_throw_adhoc)), (MVMuint32)((uintptr_t)(&MVM_exception_throw_adhoc) >> 32));
#line 2010 "src/jit/x64/emit.dasc"
        //|2:
        //| mov ARG2, CAPTURE:TMP1->body.apc;
        //| mov ARG3, WORK[name];
        //| mov ARG1, TC;
        //| callp MVM_args_has_named;
        dasm_put(Dst, 480, Dt5(->body.apc), Dt23([name]));
        dasm_put(Dst, 210, (MVMuint32)((uintptr_t)(MVM_args_has_named)), (MVMuint32)((uintptr_t)(MVM_args_has_named) >> 32));
#line 2015 "src/jit/x64/emit.dasc"
        //| mov WORK[dst], RV;
        dasm_put(Dst, 501, Dt23([dst]));
#line 2016 "src/jit/x64/emit.dasc"
        break;
    }
    case MVM_OP_capturehasnameds: {
        MVMint16 dest    = ins->operands[0].reg.orig;
        MVMint16 capture = ins->operands[1].reg.orig;
        //| mov TMP1, aword WORK[capture];
        dasm_put(Dst, 1528, Dt23([capture]));
#line 2022 "src/jit/x64/emit.dasc"
        /* if (IS_CONCRETE(capture) && REPR(capture)->ID == MVM_REPR_ID_MVMCallCapture) */
        //| test_type_object TMP1;
        //| jnz >1;
        //| cmp_repr_id TMP1, TMP2, MVM_REPR_ID_MVMCallCapture;
        //| je >2;
        //|1:
        dasm_put(Dst, 2915, DtE(->header.flags), MVM_CF_TYPE_OBJECT, DtE(->st), Dt12(->REPR), Dt13(->ID), MVM_REPR_ID_MVMCallCapture);
#line 2028 "src/jit/x64/emit.dasc"
        /* else throw */
        //| throw_adhoc "capturehasnameds needs a concrete MVMCallCapture";
        dasm_put(Dst, 306, (unsigned int)((uintptr_t)("capturehasnameds needs a concrete MVMCallCapture")), (unsigned int)(((uintptr_t)("capturehasnameds needs a concrete MVMCallCapture"))>>32));
        dasm_put(Dst, 210, (MVMuint32)((uintptr_t)(&MVM_exception_throw_adhoc)), (MVMuint32)((uintptr_t)(&MVM_exception_throw_adhoc) >> 32));
#line 2030 "src/jit/x64/emit.dasc"
        //|2:
        //| mov TMP2, CAPTURE:TMP1->body.apc;
        //| mov TMP3w, word ARGPROCCONTEXT:TMP2->num_pos;
        //| mov TMP2w, word ARGPROCCONTEXT:TMP2->arg_count;
        //| cmp TMP2w, TMP3w;
        //| setne al;
        //| movzx rax, al;
        //| mov WORK[dest], rax;
        dasm_put(Dst, 3046, Dt5(->body.apc), Dt7(->num_pos), Dt7(->arg_count), Dt23([dest]));
#line 2038 "src/jit/x64/emit.dasc"
        break;
    }
    case MVM_OP_capturenamedshash: {
        MVMint16 dst = ins->operands[0].reg.orig;
        MVMint16 obj = ins->operands[1].reg.orig;
        //| mov TMP1, WORK[obj];
        //| test_type_object TMP1;
        //| jnz >1;
        //| cmp_repr_id TMP1, TMP2, MVM_REPR_ID_MVMCallCapture;
        //| je >2;
        //|1:
        //| throw_adhoc "capturenamedshash needs a MVMCallCapture";
        dasm_put(Dst, 1028, Dt23([obj]), DtE(->header.flags), MVM_CF_TYPE_OBJECT, DtE(->st), Dt12(->REPR), Dt13(->ID), MVM_REPR_ID_MVMCallCapture, (unsigned int)((uintptr_t)("capturenamedshash needs a MVMCallCapture")), (unsigned int)(((uintptr_t)("capturenamedshash needs a MVMCallCapture"))>>32));
        dasm_put(Dst, 210, (MVMuint32)((uintptr_t)(&MVM_exception_throw_adhoc)), (MVMuint32)((uintptr_t)(&MVM_exception_throw_adhoc) >> 32));
#line 2050 "src/jit/x64/emit.dasc"
        //|2:
        //| mov ARG2, CAPTURE:TMP1->body.apc;
        //| mov ARG1, TC;
        //| callp MVM_args_slurpy_named;
        dasm_put(Dst, 3082, Dt5(->body.apc));
        dasm_put(Dst, 210, (MVMuint32)((uintptr_t)(MVM_args_slurpy_named)), (MVMuint32)((uintptr_t)(MVM_args_slurpy_named) >> 32));
#line 2054 "src/jit/x64/emit.dasc"
        //| mov WORK[dst], RV;
        dasm_put(Dst, 501, Dt23([dst]));
#line 2055 "src/jit/x64/emit.dasc"
        break;
    }
    case MVM_OP_getstdin:
    case MVM_OP_getstdout:
    case MVM_OP_getstderr: {
        MVMint16 dst = ins->operands[0].reg.orig;
        //| mov TMP3, aword TC->instance;
        dasm_put(Dst, 3099, Dt22(->instance));
#line 2062 "src/jit/x64/emit.dasc"
        if (ins->info->opcode == MVM_OP_getstdin) {
            //| mov TMP3, aword MVMINSTANCE:TMP3->stdin_handle;
            dasm_put(Dst, 595, DtC(->stdin_handle));
#line 2064 "src/jit/x64/emit.dasc"
        } else if (ins->info->opcode == MVM_OP_getstdout) {
            //| mov TMP3, aword MVMINSTANCE:TMP3->stdout_handle;
            dasm_put(Dst, 595, DtC(->stdout_handle));
#line 2066 "src/jit/x64/emit.dasc"
        } else if (ins->info->opcode == MVM_OP_getstderr) {
            //| mov TMP3, aword MVMINSTANCE:TMP3->stderr_handle;
            dasm_put(Dst, 595, DtC(->stderr_handle));
#line 2068 "src/jit/x64/emit.dasc"
        }
        //| mov aword WORK[dst], TMP3;
        dasm_put(Dst, 725, Dt23([dst]));
#line 2070 "src/jit/x64/emit.dasc"
        break;
    }
    case MVM_OP_ordat:
    case MVM_OP_ordfirst: {
        MVMint16 dst = ins->operands[0].reg.orig;
        MVMint16 str = ins->operands[1].reg.orig;
        //| mov ARG1, TC;
        //| mov ARG2, aword WORK[str];
        dasm_put(Dst, 2489, Dt23([str]));
#line 2078 "src/jit/x64/emit.dasc"
        if (op == MVM_OP_ordat) {
            MVMint16 idx = ins->operands[2].reg.orig;
            //| mov ARG3, qword WORK[idx];
            dasm_put(Dst, 734, Dt23([idx]));
#line 2081 "src/jit/x64/emit.dasc"
        } else {
            //| mov ARG3, 0;
            dasm_put(Dst, 1718);
#line 2083 "src/jit/x64/emit.dasc"
        }
        //| callp &MVM_string_ord_at;
        dasm_put(Dst, 208);
        dasm_put(Dst, 210, (MVMuint32)((uintptr_t)(&MVM_string_ord_at)), (MVMuint32)((uintptr_t)(&MVM_string_ord_at) >> 32));
#line 2085 "src/jit/x64/emit.dasc"
        //| mov qword WORK[dst], RV;
        dasm_put(Dst, 501, Dt23([dst]));
#line 2086 "src/jit/x64/emit.dasc"
        break;
    }
    case MVM_OP_getcodename: {
        MVMint16 obj  = ins->operands[0].reg.orig;
        MVMint16 code = ins->operands[1].reg.orig;
        //| mov TMP1, aword WORK[code];
        //| test_type_object TMP1;
        //| jnz >1;
        //| cmp_repr_id TMP1, TMP2, MVM_REPR_ID_MVMCode;
        //| jne >1;
        //| mov TMP2, CODE:TMP1->body.name;
        //| mov WORK[obj], TMP2;
        //| jmp >2;
        //|1:
        //| throw_adhoc "getcodename requires a concrete object";
        dasm_put(Dst, 3104, Dt23([code]), DtE(->header.flags), MVM_CF_TYPE_OBJECT, DtE(->st), Dt12(->REPR), Dt13(->ID), MVM_REPR_ID_MVMCode, Dt1D(->body.name), Dt23([obj]), (unsigned int)((uintptr_t)("getcodename requires a concrete object")), (unsigned int)(((uintptr_t)("getcodename requires a concrete object"))>>32));
        dasm_put(Dst, 210, (MVMuint32)((uintptr_t)(&MVM_exception_throw_adhoc)), (MVMuint32)((uintptr_t)(&MVM_exception_throw_adhoc) >> 32));
#line 2101 "src/jit/x64/emit.dasc"
        //|2:
        dasm_put(Dst, 316);
#line 2102 "src/jit/x64/emit.dasc"
        break;
    }
    case MVM_OP_setcodeobj: {
        MVMint16 obj  = ins->operands[0].reg.orig;
        MVMint16 code = ins->operands[1].reg.orig;
        //| mov TMP1, aword WORK[obj];
        dasm_put(Dst, 1528, Dt23([obj]));
#line 2108 "src/jit/x64/emit.dasc"
        /* if (REPR(obj)->ID == MVM_REPR_ID_MVMCode) */
        //| cmp_repr_id TMP1, TMP2, MVM_REPR_ID_MVMCode;
        //| je >1;
        dasm_put(Dst, 3158, DtE(->st), Dt12(->REPR), Dt13(->ID), MVM_REPR_ID_MVMCode);
#line 2111 "src/jit/x64/emit.dasc"
        /* else throw */
        //| throw_adhoc "setcodeobj needs a code ref";
        dasm_put(Dst, 306, (unsigned int)((uintptr_t)("setcodeobj needs a code ref")), (unsigned int)(((uintptr_t)("setcodeobj needs a code ref"))>>32));
        dasm_put(Dst, 210, (MVMuint32)((uintptr_t)(&MVM_exception_throw_adhoc)), (MVMuint32)((uintptr_t)(&MVM_exception_throw_adhoc) >> 32));
#line 2113 "src/jit/x64/emit.dasc"
        //|1:
        //| mov TMP2, aword WORK[code];
        //| mov aword CODE:TMP1->body.code_object, TMP2;
        dasm_put(Dst, 3175, Dt23([code]), Dt1D(->body.code_object));
#line 2116 "src/jit/x64/emit.dasc"
        break;
    }
    case MVM_OP_lastexpayload: {
        MVMint16 dst = ins->operands[0].reg.orig;
        //| mov TMP3, aword TC->last_payload;
        //| mov aword WORK[dst], TMP3;
        dasm_put(Dst, 3191, Dt22(->last_payload), Dt23([dst]));
#line 2122 "src/jit/x64/emit.dasc"
        break;
    }
    case MVM_OP_param_sp: {
        MVMuint16 dst = ins->operands[0].reg.orig;
        MVMuint16 off = ins->operands[1].lit_ui16;
        //| mov ARG1, TC
        //| mov ARG2, TC:ARG1->cur_frame
        //| lea ARG2, FRAME:ARG2->params
        //| mov ARG3, off
        //| callp &MVM_args_slurpy_positional;
        dasm_put(Dst, 3200, Dt22(->cur_frame), Dt2(->params), off);
        dasm_put(Dst, 210, (MVMuint32)((uintptr_t)(&MVM_args_slurpy_positional)), (MVMuint32)((uintptr_t)(&MVM_args_slurpy_positional) >> 32));
#line 2132 "src/jit/x64/emit.dasc"
        //| mov qword WORK[dst], RV;
        dasm_put(Dst, 501, Dt23([dst]));
#line 2133 "src/jit/x64/emit.dasc"
        break;
    }
    case MVM_OP_param_sn: {
        MVMuint16 dst = ins->operands[0].reg.orig;
        //| mov ARG1, TC
        //| mov ARG2, TC:ARG1->cur_frame
        //| lea ARG2, FRAME:ARG2->params
        //| callp &MVM_args_slurpy_named;
        dasm_put(Dst, 3218, Dt22(->cur_frame), Dt2(->params));
        dasm_put(Dst, 210, (MVMuint32)((uintptr_t)(&MVM_args_slurpy_named)), (MVMuint32)((uintptr_t)(&MVM_args_slurpy_named) >> 32));
#line 2141 "src/jit/x64/emit.dasc"
        //| mov qword WORK[dst], RV;
        dasm_put(Dst, 501, Dt23([dst]));
#line 2142 "src/jit/x64/emit.dasc"
        break;
    }
    case MVM_OP_sp_cas_o: {
        MVMint16 target = ins->operands[1].reg.orig;
        MVMint16 expected = ins->operands[2].reg.orig;
        MVMint16 value = ins->operands[3].reg.orig;
        MVMint16 result = ins->operands[0].reg.orig;
        //| mov ARG1, TC;
        //| mov ARG2, aword WORK[target];
        //| mov ARG3, aword WORK[expected];
        //| mov ARG4, aword WORK[value];
        //|.if WIN32;
        //| lea TMP6, WORK[result]
        //| mov ARG5, TMP6
        //|.else;
        //| lea ARG5, WORK[result]
        //|.endif
        //| mov FUNCTION, OBJECT:ARG2->st;
        //| mov FUNCTION, STABLE:FUNCTION->container_spec;
        //| mov FUNCTION, CONTAINERSPEC:FUNCTION->cas;
        //| call FUNCTION;
        dasm_put(Dst, 3232, Dt23([target]), Dt23([expected]), Dt23([value]), Dt23([result]), DtE(->st), Dt12(->container_spec), Dt17(->cas));
#line 2163 "src/jit/x64/emit.dasc"
        break;
    }
    case MVM_OP_sp_atomicload_o: {
        MVMint16 target = ins->operands[1].reg.orig;
        MVMint16 result = ins->operands[0].reg.orig;
        //| mov ARG1, TC;
        //| mov ARG2, aword WORK[target];
        //| mov FUNCTION, OBJECT:ARG2->st;
        //| mov FUNCTION, STABLE:FUNCTION->container_spec;
        //| mov FUNCTION, CONTAINERSPEC:FUNCTION->atomic_load;
        //| call FUNCTION;
        //| mov WORK[result], RV
        dasm_put(Dst, 3269, Dt23([target]), DtE(->st), Dt12(->container_spec), Dt17(->atomic_load), Dt23([result]));
#line 2175 "src/jit/x64/emit.dasc"
        break;
    }
    case MVM_OP_sp_atomicstore_o: {
        MVMint16 target = ins->operands[0].reg.orig;
        MVMint16 value = ins->operands[1].reg.orig;
        //| mov ARG1, TC;
        //| mov ARG2, aword WORK[target];
        //| mov ARG3, aword WORK[value];
        //| mov FUNCTION, OBJECT:ARG2->st;
        //| mov FUNCTION, STABLE:FUNCTION->container_spec;
        //| mov FUNCTION, CONTAINERSPEC:FUNCTION->atomic_store;
        //| call FUNCTION;
        dasm_put(Dst, 3298, Dt23([target]), Dt23([value]), DtE(->st), Dt12(->container_spec), Dt17(->atomic_store));
#line 2187 "src/jit/x64/emit.dasc"
        break;
    }
    default:
        MVM_panic(1, "Can't JIT opcode <%s>", ins->info->name);
    }
}



/* Call argument decoder */
static void load_call_arg(MVMThreadContext *tc, MVMJitCompiler *compiler, MVMJitGraph *jg,
                          MVMJitCallArg arg) {
    switch(arg.type) {
    case MVM_JIT_INTERP_VAR:
        switch (arg.v.ivar) {
        case MVM_JIT_INTERP_TC:
            //| mov TMP6, TC;
            dasm_put(Dst, 3327);
#line 2204 "src/jit/x64/emit.dasc"
            break;
        case MVM_JIT_INTERP_CU:
            //| mov TMP6, CU;
            dasm_put(Dst, 3332);
#line 2207 "src/jit/x64/emit.dasc"
            break;
        case MVM_JIT_INTERP_FRAME:
            //| mov TMP6, TC->cur_frame;
            dasm_put(Dst, 169, Dt22(->cur_frame));
#line 2210 "src/jit/x64/emit.dasc"
            break;
        case MVM_JIT_INTERP_PARAMS:
            //| mov TMP6, TC->cur_frame;
            //| lea TMP6, FRAME:TMP6->params;
            dasm_put(Dst, 3337, Dt22(->cur_frame), Dt2(->params));
#line 2214 "src/jit/x64/emit.dasc"
            break;
        case MVM_JIT_INTERP_CALLER:
            //| mov TMP6, TC->cur_frame;
            //| mov TMP6, aword FRAME:TMP6->caller;
            dasm_put(Dst, 3346, Dt22(->cur_frame), Dt2(->caller));
#line 2218 "src/jit/x64/emit.dasc"
            break;
        }
        break;
    case MVM_JIT_REG_VAL:
        //| mov TMP6, qword WORK[arg.v.reg];
        dasm_put(Dst, 3355, Dt23([arg.v.reg]));
#line 2223 "src/jit/x64/emit.dasc"
        break;
    case MVM_JIT_REG_VAL_F:
        //| mov TMP6, qword WORK[arg.v.reg];
        dasm_put(Dst, 3355, Dt23([arg.v.reg]));
#line 2226 "src/jit/x64/emit.dasc"
        break;
    case MVM_JIT_REG_ADDR:
        //| lea TMP6, WORK[arg.v.reg];
        dasm_put(Dst, 3360, Dt23([arg.v.reg]));
#line 2229 "src/jit/x64/emit.dasc"
        break;
    case MVM_JIT_STR_IDX:
        //| get_string TMP6, arg.v.lit_i64;
         MVM_cu_ensure_string_decoded(tc, jg->sg->sf->body.cu, arg.v.lit_i64);
        dasm_put(Dst, 3365, Dt24(->body.strings), Dt15([arg.v.lit_i64]));
#line 2232 "src/jit/x64/emit.dasc"
        break;
    case MVM_JIT_LITERAL:
        //| mov TMP6, arg.v.lit_i64;
        dasm_put(Dst, 3374, arg.v.lit_i64);
#line 2235 "src/jit/x64/emit.dasc"
        break;
    case MVM_JIT_LITERAL_64:
    case MVM_JIT_LITERAL_PTR:
    case MVM_JIT_LITERAL_F:
        //| mov64 TMP6, arg.v.lit_i64;
        dasm_put(Dst, 3379, (unsigned int)(arg.v.lit_i64), (unsigned int)((arg.v.lit_i64)>>32));
#line 2240 "src/jit/x64/emit.dasc"
        break;
    case MVM_JIT_REG_STABLE:
        //| mov TMP6, qword WORK[arg.v.reg];
        //| mov TMP6, OBJECT:TMP6->st;
        dasm_put(Dst, 233, Dt23([arg.v.reg]), DtE(->st));
#line 2244 "src/jit/x64/emit.dasc"
        break;
    case MVM_JIT_REG_OBJBODY:
        //| mov TMP6, qword WORK[arg.v.reg];
        //| lea TMP6, STOOGE:TMP6->data;
        dasm_put(Dst, 3384, Dt23([arg.v.reg]), DtF(->data));
#line 2248 "src/jit/x64/emit.dasc"
        break;
    case MVM_JIT_REG_DYNIDX:
        //| get_cur_op TMP5;
        //| xor TMP6, TMP6;
        //| mov TMP6w, U16:TMP5[arg.v.reg];
        //| mov TMP6, qword [WORK + TMP6*8];
        dasm_put(Dst, 3393, Dt22(->interp_cur_op), Dt1F([arg.v.reg]));
#line 2254 "src/jit/x64/emit.dasc"
        break;
    case MVM_JIT_DATA_LABEL:
        //| lea TMP6, [=>(arg.v.lit_i64)];
        dasm_put(Dst, 3413, (arg.v.lit_i64));
#line 2257 "src/jit/x64/emit.dasc"
        break;
    case MVM_JIT_ARG_I64:
        //| mov TMP6, TC->cur_frame;
        //| mov TMP6, FRAME:TMP6->args;
        //| mov TMP6, qword REGISTER:TMP6[arg.v.lit_i64];
        dasm_put(Dst, 3418, Dt22(->cur_frame), Dt2(->args), Dt1([arg.v.lit_i64]));
#line 2262 "src/jit/x64/emit.dasc"
        break;
    case MVM_JIT_ARG_I64_RW:
        //| mov TMP6, TC->cur_frame;
        //| mov TMP6, FRAME:TMP6->args;
        //| lea TMP6, qword REGISTER:TMP6[arg.v.lit_i64];
        dasm_put(Dst, 3431, Dt22(->cur_frame), Dt2(->args), Dt1([arg.v.lit_i64]));
#line 2267 "src/jit/x64/emit.dasc"
        break;
    case MVM_JIT_ARG_PTR:
        //| mov TMP6, TC->cur_frame;
        //| mov TMP6, FRAME:TMP6->args;
        //| mov TMP6, qword REGISTER:TMP6[arg.v.lit_i64];
        //| mov TMP6, aword STOOGE:TMP6->data;
        dasm_put(Dst, 3444, Dt22(->cur_frame), Dt2(->args), Dt1([arg.v.lit_i64]), DtF(->data));
#line 2273 "src/jit/x64/emit.dasc"
        break;
    case MVM_JIT_ARG_VMARRAY:
        //| mov TMP6, TC->cur_frame;
        //| mov TMP6, FRAME:TMP6->args;
        //| mov TMP6, qword REGISTER:TMP6[arg.v.lit_i64];
        //| mov TMP6, aword VMARRAY:TMP6->body.slots;
        dasm_put(Dst, 3444, Dt22(->cur_frame), Dt2(->args), Dt1([arg.v.lit_i64]), Dt10(->body.slots));
#line 2279 "src/jit/x64/emit.dasc"
        break;
    case MVM_JIT_PARAM_I64:
        //| mov TMP6, qword WORK[arg.v.lit_i64];
        dasm_put(Dst, 3355, Dt23([arg.v.lit_i64]));
#line 2282 "src/jit/x64/emit.dasc"
        break;
    case MVM_JIT_PARAM_I64_RW:
        //| lea TMP6, qword WORK[arg.v.lit_i64];
        dasm_put(Dst, 3360, Dt23([arg.v.lit_i64]));
#line 2285 "src/jit/x64/emit.dasc"
        break;
    case MVM_JIT_PARAM_PTR:
        //| mov TMP6, aword WORK[arg.v.lit_i64];
        //| mov TMP6, aword STOOGE:TMP6->data;
        dasm_put(Dst, 233, Dt23([arg.v.lit_i64]), DtF(->data));
#line 2289 "src/jit/x64/emit.dasc"
        break;
    case MVM_JIT_PARAM_VMARRAY:
        //| mov TMP6, aword WORK[arg.v.lit_i64];
        //| mov TMP6, aword VMARRAY:TMP6->body.slots;
        dasm_put(Dst, 233, Dt23([arg.v.lit_i64]), Dt10(->body.slots));
#line 2293 "src/jit/x64/emit.dasc"
        break;
    case MVM_JIT_SPESH_SLOT_VALUE:
        //| get_spesh_slot TMP6, arg.v.lit_i64;
        dasm_put(Dst, 3418, Dt22(->cur_frame), Dt2(->effective_spesh_slots), Dt15([arg.v.lit_i64]));
#line 2296 "src/jit/x64/emit.dasc"
        break;
    case MVM_JIT_STACK_VALUE:
        //| mov TMP6, [rbp-(0x28+arg.v.lit_i64*8)];
        dasm_put(Dst, 3461, -(0x28+arg.v.lit_i64*8));
#line 2299 "src/jit/x64/emit.dasc"
        break;
    default:
        MVM_oops(tc, "JIT: Unknown JIT argument type %d", arg.type);
    }
}

static void emit_gpr_arg(MVMThreadContext *tc, MVMJitCompiler *compiler, MVMJitGraph *jg,
                         MVMint32 i) {
    switch (i) {
    case 0:
        //| mov ARG1, TMP6;
        dasm_put(Dst, 3466);
#line 2310 "src/jit/x64/emit.dasc"
        break;
    case 1:
        //| mov ARG2, TMP6;
        dasm_put(Dst, 3470);
#line 2313 "src/jit/x64/emit.dasc"
        break;
    case 2:
        //| mov ARG3, TMP6;
        dasm_put(Dst, 3474);
#line 2316 "src/jit/x64/emit.dasc"
        break;
    case 3:
        //| mov ARG4, TMP6;
        dasm_put(Dst, 3478);
#line 2319 "src/jit/x64/emit.dasc"
        break;
//|.if POSIX
    case 4:
//|        mov ARG5, TMP6;
dasm_put(Dst, 3482);
       break;
#line 2324 "src/jit/x64/emit.dasc"
  case 5:
//|      mov ARG6, TMP6;
dasm_put(Dst, 3486);
     break;
#line 2327 "src/jit/x64/emit.dasc"
//|.endif
    default:
        MVM_oops(tc, "JIT: can't store %d arguments in GPR", i);
    }
}

static void emit_sse_arg(MVMThreadContext *tc, MVMJitCompiler *compiler, MVMJitGraph *jg,
                         MVMint32 i) {
    switch (i) {
    case 0:
        //| movd ARG1F, TMP6;
        dasm_put(Dst, 3490);
#line 2338 "src/jit/x64/emit.dasc"
        break;
    case 1:
        //| movd ARG2F, TMP6;
        dasm_put(Dst, 3496);
#line 2341 "src/jit/x64/emit.dasc"
        break;
    case 2:
        //| movd ARG3F, TMP6;
        dasm_put(Dst, 3502);
#line 2344 "src/jit/x64/emit.dasc"
        break;
    case 3:
        //| movd ARG4F, TMP6;
        dasm_put(Dst, 3508);
#line 2347 "src/jit/x64/emit.dasc"
        break;
//|.if POSIX
    case 4:
//|        movd ARG5F, TMP6;
dasm_put(Dst, 3514);
       break;
#line 2352 "src/jit/x64/emit.dasc"
    case 5:
//|         movd ARG6F, TMP6;
dasm_put(Dst, 3520);
        break;
#line 2355 "src/jit/x64/emit.dasc"
    case 6:
//|        movd ARG7F, TMP6;
dasm_put(Dst, 3527);
       break;
#line 2358 "src/jit/x64/emit.dasc"
    case 7:
//|        movd ARG8F, TMP6;
dasm_put(Dst, 3534);
       break;
#line 2361 "src/jit/x64/emit.dasc"
//|.endif
    default:
        MVM_oops(tc, "JIT: can't put  %d arguments in SSE", i);
    }
}

static void emit_stack_arg(MVMThreadContext *tc, MVMJitCompiler *compiler, MVMJitGraph *jg,
                           MVMint32 arg_size, MVMint32 pos) {
    /* basically, stack arguments are passed in right-to-left order
       on both POSIX and W64 backends, it seems. Thus the most logical
       thing to do is to count from the stack top upwards. */
    if (pos + arg_size > 160) {
        MVM_oops(tc, "JIT: trying to pass arguments "
                 " in local space (stack top offset:"
                 " %d, size: %d)", pos, arg_size);
    }
    switch(arg_size) {
    case 1:
        //| mov byte [rsp+pos], TMP6b;
        dasm_put(Dst, 3541, pos);
#line 2380 "src/jit/x64/emit.dasc"
        break;
    case 2:
        //| mov word [rsp+pos], TMP6w;
        dasm_put(Dst, 3548, pos);
#line 2383 "src/jit/x64/emit.dasc"
        break;
    case 4:
        //| mov dword [rsp+pos], TMP6d;
        dasm_put(Dst, 3549, pos);
#line 2386 "src/jit/x64/emit.dasc"
        break;
    case 8:
        //| mov qword [rsp+pos], TMP6;
        dasm_put(Dst, 3556, pos);
#line 2389 "src/jit/x64/emit.dasc"
        break;
    default:
        MVM_oops(tc, "JIT: can't pass arguments size %d bytes",
                 arg_size);
    }
}

static void emit_posix_callargs(MVMThreadContext *tc, MVMJitCompiler *compiler, MVMJitGraph *jg,
                                MVMJitCallArg args[], MVMint32 num_args) {
    MVMint32 num_gpr = 0, num_fpr = 0, num_stack = 0, i;
    MVMJitCallArg in_gpr[6], in_fpr[8], *on_stack = NULL;
    if (num_args > 6)
        on_stack = MVM_malloc(sizeof(MVMJitCallArg) * (num_args - 6));
    /* divide in gpr, fpr, stack values */
    for (i = 0; i < num_args; i++) {
        switch (args[i].type) {
        case MVM_JIT_INTERP_VAR:
        case MVM_JIT_REG_VAL:
        case MVM_JIT_REG_ADDR:
        case MVM_JIT_REG_OBJBODY:
        case MVM_JIT_REG_STABLE:
        case MVM_JIT_REG_DYNIDX:
        case MVM_JIT_STR_IDX:
        case MVM_JIT_LITERAL:
        case MVM_JIT_LITERAL_64:
        case MVM_JIT_LITERAL_PTR:
        case MVM_JIT_DATA_LABEL:
        case MVM_JIT_ARG_I64:
        case MVM_JIT_ARG_I64_RW:
        case MVM_JIT_ARG_PTR:
        case MVM_JIT_ARG_VMARRAY:
        case MVM_JIT_PARAM_I64:
        case MVM_JIT_PARAM_I64_RW:
        case MVM_JIT_PARAM_PTR:
        case MVM_JIT_PARAM_VMARRAY:
        case MVM_JIT_SPESH_SLOT_VALUE:
        case MVM_JIT_STACK_VALUE:
            if (num_gpr < 6) {
                in_gpr[num_gpr++] = args[i];
            } else {
                on_stack[num_stack++] = args[i];
            }
            break;
        case MVM_JIT_REG_VAL_F:
        case MVM_JIT_LITERAL_F:
            if (num_fpr < 8) {
                in_fpr[num_fpr++] = args[i];
            } else {
                on_stack[num_stack++] = args[i];
            }
            break;
        default:
            MVM_oops(tc, "JIT: Unknown JIT argument type %d for emit_posix_callargs", args[i].type);
        }
    }
    for (i = 0; i < num_gpr; i++) {
        load_call_arg(tc, compiler, jg, in_gpr[i]);
        emit_gpr_arg(tc, compiler, jg, i);
    }
    for (i = 0; i < num_fpr; i++) {
        load_call_arg(tc, compiler, jg, in_fpr[i]);
        emit_sse_arg(tc, compiler, jg, i);
    }
    /* push right-to-left */
    for (i = 0; i < num_stack; i++) {
        load_call_arg(tc, compiler, jg, on_stack[i]);
        // I'm not sure this is correct, btw
        emit_stack_arg(tc, compiler, jg, 8, i*8);
    }
    if (on_stack)
        MVM_free(on_stack);
}

static void emit_win64_callargs(MVMThreadContext *tc, MVMJitCompiler *compiler, MVMJitGraph *jg,
                                MVMJitCallArg args[], MVMint32 num_args) {
    MVMint32 i;
    MVMint32 num_reg_args = (num_args > 4 ? 4 : num_args);
    for (i = 0; i < num_reg_args; i++) {
        load_call_arg(tc, compiler, jg, args[i]);
        if (args[i].type == MVM_JIT_REG_VAL_F ||
            args[i].type == MVM_JIT_LITERAL_F) {
            emit_sse_arg(tc, compiler, jg, i);
        } else {
            emit_gpr_arg(tc, compiler, jg, i);
        }
    }
    for (; i < num_args; i++) {
        load_call_arg(tc, compiler, jg, args[i]);
        emit_stack_arg(tc, compiler, jg, 8, i * 8);
    }
}

void MVM_jit_emit_call_c(MVMThreadContext *tc, MVMJitCompiler *compiler, MVMJitGraph *jg,
                         MVMJitCallC * call_spec) {

    MVM_jit_log(tc, "emit c call <%d args>\n", call_spec->num_args);
    if (call_spec->has_vargs) {
        MVM_oops(tc, "JIT can't handle varargs yet");
    }
    //|.if WIN32;
#line 2490 "src/jit/x64/emit.dasc"
    //|.else;
     emit_posix_callargs(tc, compiler, jg, call_spec->args, call_spec->num_args);
    //|.endif
    /* Emit the call. I think we should be able to do something smarter than
     * store the constant into the bytecode, like a data segment. But I'm
     * not sure. */
    //| callp call_spec->func_ptr;
    dasm_put(Dst, 208);
    dasm_put(Dst, 210, (MVMuint32)((uintptr_t)(call_spec->func_ptr)), (MVMuint32)((uintptr_t)(call_spec->func_ptr) >> 32));
    dasm_put(Dst, 216);
#line 2497 "src/jit/x64/emit.dasc"
    /* right, now determine what to do with the return value */
    switch(call_spec->rv_mode) {
    case MVM_JIT_RV_VOID:
        break;
    case MVM_JIT_RV_INT:
    case MVM_JIT_RV_PTR:
        //| mov WORK[call_spec->rv_idx], RV;
        dasm_put(Dst, 506, Dt23([call_spec->rv_idx]));
#line 2504 "src/jit/x64/emit.dasc"
        break;
    case MVM_JIT_RV_NUM:
        //| movsd qword WORK[call_spec->rv_idx], RVF;
        dasm_put(Dst, 1576, Dt23([call_spec->rv_idx]));
#line 2507 "src/jit/x64/emit.dasc"
        break;
    case MVM_JIT_RV_DEREF:
        //| mov TMP1, [RV];
        //| mov WORK[call_spec->rv_idx], TMP1;
        dasm_put(Dst, 3563, Dt23([call_spec->rv_idx]));
#line 2511 "src/jit/x64/emit.dasc"
        break;
    case MVM_JIT_RV_ADDR:
        /* store local at address */
        //| mov TMP1, WORK[call_spec->rv_idx];
        //| mov [RV], TMP1;
        dasm_put(Dst, 3571, Dt23([call_spec->rv_idx]));
#line 2516 "src/jit/x64/emit.dasc"
        break;
    case MVM_JIT_RV_DYNIDX:
        /* store in register relative to cur_op */
        //| get_cur_op TMP1;
        //| xor TMP2, TMP2;
        //| mov TMP2w, word [TMP1 + call_spec->rv_idx*2];
        //| mov aword [WORK + TMP2*8], RV;
        dasm_put(Dst, 3579, Dt22(->interp_cur_op), call_spec->rv_idx*2);
#line 2523 "src/jit/x64/emit.dasc"
        break;
    case MVM_JIT_RV_DEREF_OR_VMNULL:
        //| test RV, RV;
        //| jz >4;
        //| mov TMP1, [RV];
        //| jmp >5;
        //|4:
        //| get_vmnull TMP1;
        //|5:
        //| mov WORK[call_spec->rv_idx], TMP1;
        dasm_put(Dst, 3598, Dt22(->instance), DtC(->VMNull), Dt23([call_spec->rv_idx]));
#line 2533 "src/jit/x64/emit.dasc"
        break;
    case MVM_JIT_RV_TO_STACK:
        //| mov [rbp-(0x28+call_spec->rv_idx*8)], RV;
        dasm_put(Dst, 3629, -(0x28+call_spec->rv_idx*8));
#line 2536 "src/jit/x64/emit.dasc"
        break;
    }
}

void MVM_jit_emit_block_branch(MVMThreadContext *tc, MVMJitCompiler *compiler, MVMJitGraph *jg,
                               MVMJitBranch * branch) {
    MVMSpeshIns *ins = branch->ins;
    MVMint32 name = branch->dest;
    /* move gc sync point to the front so as to not have
     * awkward dispatching issues */
    //| gc_sync_point;
    dasm_put(Dst, 3634, Dt22(->gc_status));
    dasm_put(Dst, 210, (MVMuint32)((uintptr_t)(&MVM_gc_enter_from_interrupt)), (MVMuint32)((uintptr_t)(&MVM_gc_enter_from_interrupt) >> 32));
    dasm_put(Dst, 1409);
#line 2547 "src/jit/x64/emit.dasc"
    if (ins == NULL || ins->info->opcode == MVM_OP_goto) {
        MVM_jit_log(tc, "emit jump to label %d\n", name);
        if (name == MVM_JIT_BRANCH_EXIT) {
            //| jmp ->exit
            dasm_put(Dst, 3649);
#line 2551 "src/jit/x64/emit.dasc"
        } else {
            //| jmp =>(name)
            dasm_put(Dst, 3654, (name));
#line 2553 "src/jit/x64/emit.dasc"
        }
    } else {
        MVMint16 val = ins->operands[0].reg.orig;
        MVM_jit_log(tc, "emit branch <%s> to label %d\n",
                    ins->info->name, name);
        switch(ins->info->opcode) {
        case MVM_OP_if_i:
            //| mov rax, WORK[val];
            //| test rax, rax;
            //| jnz =>(name); // jump to dynamic label
            dasm_put(Dst, 3658, Dt23([val]), (name));
#line 2563 "src/jit/x64/emit.dasc"
            break;
        case MVM_OP_unless_i:
            //| mov rax, WORK[val];
            //| test rax, rax;
            //| jz =>(name);
            dasm_put(Dst, 3669, Dt23([val]), (name));
#line 2568 "src/jit/x64/emit.dasc"
            break;
        case MVM_OP_if_n:
            //| movd xmm0, qword WORK[val];
            //| xorpd xmm1, xmm1; // make it zero
            //| ucomisd xmm0, xmm1;
            //| jp =>(name);  // is NaN?
            //| jne =>(name); // not equal to zero? we're golden
            dasm_put(Dst, 3680, Dt23([val]), (name), (name));
#line 2575 "src/jit/x64/emit.dasc"
            break;
        case MVM_OP_unless_n:
            //| movd xmm0, qword WORK[val];
            //| xorpd xmm1, xmm1; // make it zero
            //| ucomisd xmm0, xmm1;
            //| jp >1; // is NaN
            //| jne >1; // is not zero
            //| jmp =>(name); // it is zero yay!
            //|1:
            dasm_put(Dst, 3701, Dt23([val]), (name));
#line 2584 "src/jit/x64/emit.dasc"
            break;
        case MVM_OP_if_s0:
        case MVM_OP_unless_s0:
            //| mov ARG1, TC;
            //| mov ARG2, WORK[val];
            //| callp &MVM_coerce_istrue_s;
            dasm_put(Dst, 3729, Dt23([val]));
            dasm_put(Dst, 210, (MVMuint32)((uintptr_t)(&MVM_coerce_istrue_s)), (MVMuint32)((uintptr_t)(&MVM_coerce_istrue_s) >> 32));
#line 2590 "src/jit/x64/emit.dasc"
            //| test RV, RV;
            dasm_put(Dst, 3739);
#line 2591 "src/jit/x64/emit.dasc"
            if (ins->info->opcode == MVM_OP_unless_s0)
                //| jz =>(name);
                dasm_put(Dst, 3676, (name));
#line 2593 "src/jit/x64/emit.dasc"
            else
                //| jnz =>(name);
                dasm_put(Dst, 3665, (name));
#line 2595 "src/jit/x64/emit.dasc"
            break;
        case MVM_OP_ifnonnull:
            //| mov TMP1, WORK[val];
            //| test TMP1, TMP1;
            //| jz >1;
            //| get_vmnull TMP2;
            //| cmp TMP1, TMP2;
            //| je >1;
            //| jmp =>(name);
            //|1:
            dasm_put(Dst, 3748, Dt23([val]), Dt22(->instance), DtC(->VMNull), (name));
#line 2605 "src/jit/x64/emit.dasc"
            break;
        case MVM_OP_if_s:
            //| mov TMP1, WORK[val];
            //| test TMP1, TMP1;
            //| jz >1;
            //| cmp dword STRING:TMP1->body.num_graphs, 0;
            //| je >1;
            //| jmp =>(name);
            //|1:
            dasm_put(Dst, 3780, Dt23([val]), Dt14(->body.num_graphs), (name));
#line 2614 "src/jit/x64/emit.dasc"
            break;
        case MVM_OP_unless_s:
            //| mov TMP1, WORK[val];
            //| test TMP1, TMP1;
            //| jz =>(name);
            //| cmp dword STRING:TMP1->body.num_graphs, 0;
            //| je =>(name);
            //|1:
            dasm_put(Dst, 3805, Dt23([val]), (name), Dt14(->body.num_graphs), (name));
#line 2622 "src/jit/x64/emit.dasc"
            break;
        case MVM_OP_indexat:
        case MVM_OP_indexnat: {
            MVMint16 offset = ins->operands[1].reg.orig;
            MVMuint32 str_idx = ins->operands[2].lit_str_idx;
            //| mov ARG1, TC;
            //| mov ARG2, WORK[val];
            //| mov ARG3, WORK[offset];
            //| get_string ARG4, str_idx;
            dasm_put(Dst, 3825, Dt23([val]), Dt23([offset]));
             MVM_cu_ensure_string_decoded(tc, jg->sg->sf->body.cu, str_idx);
#line 2631 "src/jit/x64/emit.dasc"
            //| callp &MVM_string_char_at_in_string;
            dasm_put(Dst, 3838, Dt24(->body.strings), Dt15([str_idx]));
            dasm_put(Dst, 210, (MVMuint32)((uintptr_t)(&MVM_string_char_at_in_string)), (MVMuint32)((uintptr_t)(&MVM_string_char_at_in_string) >> 32));
            dasm_put(Dst, 216);
#line 2632 "src/jit/x64/emit.dasc"
            /* This subtlety is due to the value being overloaded to
             * -2 if it is out of bounds. Note that -1 is passed as a
             * 32 bit integer, but this magically works in a 64 bit
             * comparison because 32 bit values are sign-extended */
            //| cmp RV, -1;
            dasm_put(Dst, 3848);
#line 2637 "src/jit/x64/emit.dasc"
            if (ins->info->opcode == MVM_OP_indexat)
                //| jle =>(name);
                dasm_put(Dst, 3855, (name));
#line 2639 "src/jit/x64/emit.dasc"
            else {

                //| jne =>(name);
                dasm_put(Dst, 3665, (name));
#line 2642 "src/jit/x64/emit.dasc"
            }
            break;
        }
        default:
            MVM_panic(1, "JIT: Can't handle conditional <%s>", ins->info->name);
        }
    }
}

void MVM_jit_emit_label(MVMThreadContext *tc, MVMJitCompiler *compiler, MVMJitGraph *jg,
                        MVMint32 label) {
    MVM_jit_log(tc, "Emitting label %d\n", label);
    //| =>(label):
    dasm_put(Dst, 195, (label));
#line 2655 "src/jit/x64/emit.dasc"
}

void MVM_jit_emit_branch(MVMThreadContext *tc, MVMJitCompiler *compiler, MVMint32 label) {
    //| jmp =>(label);
    dasm_put(Dst, 3654, (label));
#line 2659 "src/jit/x64/emit.dasc"
}

void MVM_jit_emit_conditional_branch(MVMThreadContext *tc, MVMJitCompiler *compiler,
                                     MVMint32 cond, MVMint32 label) {
    switch (cond) {
    case MVM_JIT_LT:
        //| jl =>(label);
        dasm_put(Dst, 3859, (label));
#line 2666 "src/jit/x64/emit.dasc"
        break;
    case MVM_JIT_LE:
        //| jle =>(label);
        dasm_put(Dst, 3855, (label));
#line 2669 "src/jit/x64/emit.dasc"
        break;
    case MVM_JIT_EQ:
        //| je =>(label);
        dasm_put(Dst, 3676, (label));
#line 2672 "src/jit/x64/emit.dasc"
        break;
    case MVM_JIT_NE:
        //| jne =>(label);
        dasm_put(Dst, 3665, (label));
#line 2675 "src/jit/x64/emit.dasc"
        break;
    case MVM_JIT_GE:
        //| jge =>(label);
        dasm_put(Dst, 3863, (label));
#line 2678 "src/jit/x64/emit.dasc"
        break;
    case MVM_JIT_GT:
        //| jg =>(label);
        dasm_put(Dst, 3867, (label));
#line 2681 "src/jit/x64/emit.dasc"
        break;
    case MVM_JIT_NZ:
        //| jnz =>(label);
        dasm_put(Dst, 3665, (label));
#line 2684 "src/jit/x64/emit.dasc"
        break;
    case MVM_JIT_ZR:
        //| jz =>(label);
        dasm_put(Dst, 3676, (label));
#line 2687 "src/jit/x64/emit.dasc"
        break;
    default:
        MVM_oops(tc, "this condition cannot be compiled with conditional_branch");
    }
}

void MVM_jit_emit_guard(MVMThreadContext *tc, MVMJitCompiler *compiler, MVMJitGraph *jg,
                        MVMJitGuard *guard) {
    MVMint16 op        = guard->ins->info->opcode;
    MVMint16 obj       = guard->ins->operands[0].reg.orig;
    MVM_jit_log(tc, "emit guard <%s>\n", guard->ins->info->name);
    /* load object and spesh slot value, except for those that don't need it */
    //| mov TMP1, WORK[obj];
    dasm_put(Dst, 1528, Dt23([obj]));
#line 2700 "src/jit/x64/emit.dasc"
    if (op != MVM_OP_sp_guardjustconc && op != MVM_OP_sp_guardjusttype) {
        MVMint16 spesh_idx = guard->ins->operands[1].lit_i16;
        //| get_spesh_slot TMP2, spesh_idx;
        dasm_put(Dst, 3871, Dt22(->cur_frame), Dt2(->effective_spesh_slots), Dt15([spesh_idx]));
#line 2703 "src/jit/x64/emit.dasc"
    }
    if (op == MVM_OP_sp_guard) {
        /* object in question should just match the type, so it shouldn't
         * be zero, and the STABLE should be equal to the value in the spesh
         * slot */
        /* check for null */
        //| test TMP1, TMP1;
        //| jz >1;
        dasm_put(Dst, 3884);
#line 2711 "src/jit/x64/emit.dasc"
        /* get stable and compare */
        //| cmp TMP2, OBJECT:TMP1->st;
        //| jne >1;
        dasm_put(Dst, 3892, DtE(->st));
#line 2714 "src/jit/x64/emit.dasc"
        /* we're good, no need to deopt */
    } else if (op == MVM_OP_sp_guardtype) {
        /* object in question should be a type object, so it shouldn't
         * be zero, should not be concrete, and the STABLE should be
         * equal to the value in the spesh slot */
        /* check for null */
        //| test TMP1, TMP1;
        //| jz >1;
        dasm_put(Dst, 3884);
#line 2722 "src/jit/x64/emit.dasc"
        /* check if type object (not concrete) */
        //| test_type_object TMP1;
        dasm_put(Dst, 3901, DtE(->header.flags), MVM_CF_TYPE_OBJECT);
#line 2724 "src/jit/x64/emit.dasc"
        /* if zero, this is a concrete object, and we should deopt */
        //| jz >1;
        dasm_put(Dst, 3170);
#line 2726 "src/jit/x64/emit.dasc"
        /* get stable and compare */
        //| cmp TMP2, OBJECT:TMP1->st;
        //| jne >1;
        dasm_put(Dst, 3892, DtE(->st));
#line 2729 "src/jit/x64/emit.dasc"
        /* we're good, no need to deopt */
    } else if (op == MVM_OP_sp_guardconc) {
        /* object should be a non-null concrete (non-type) object */
        //| test TMP1, TMP1;
        //| jz >1;
        dasm_put(Dst, 3884);
#line 2734 "src/jit/x64/emit.dasc"
        /* shouldn't be type object */
        //| test_type_object TMP1;
        //| jnz >1;
        dasm_put(Dst, 3908, DtE(->header.flags), MVM_CF_TYPE_OBJECT);
#line 2737 "src/jit/x64/emit.dasc"
        /* should have our stable */
        //| cmp TMP2, OBJECT:TMP1->st;
        //| jne >1;
        dasm_put(Dst, 3892, DtE(->st));
#line 2740 "src/jit/x64/emit.dasc"
    } else if (op == MVM_OP_sp_guardsf) {
        /* Should be an MVMCode */
        //| cmp_repr_id TMP1, TMP3, MVM_REPR_ID_MVMCode;
        //| jne >1;
        //| cmp TMP2, CODE:TMP1->body.sf;
        //| jne >1;
        dasm_put(Dst, 3919, DtE(->st), Dt12(->REPR), Dt13(->ID), MVM_REPR_ID_MVMCode, Dt1D(->body.sf));
#line 2746 "src/jit/x64/emit.dasc"
    } else if (op == MVM_OP_sp_guardobj) {
        /* object should match that from the spesh slot */
        //| cmp TMP2, TMP1;
        //| jne >1;
        dasm_put(Dst, 3945);
#line 2750 "src/jit/x64/emit.dasc"
    } else if (op == MVM_OP_sp_guardnotobj) {
        /* object should not match that from the spesh slot */
        //| cmp TMP2, TMP1;
        //| je >1;
        dasm_put(Dst, 3953);
#line 2754 "src/jit/x64/emit.dasc"
    } else if (op == MVM_OP_sp_guardjustconc) {
        /* object should be a non-null concrete (non-type) object;
         * exact type doesn't matter */
        //| test TMP1, TMP1;
        //| jz >1;
        dasm_put(Dst, 3884);
#line 2759 "src/jit/x64/emit.dasc"
        /* shouldn't be type object */
        //| test_type_object TMP1;
        //| jnz >1;
        dasm_put(Dst, 3908, DtE(->header.flags), MVM_CF_TYPE_OBJECT);
#line 2762 "src/jit/x64/emit.dasc"
    } else if (op == MVM_OP_sp_guardjusttype) {
        /* object in question should be a type object, so it shouldn't
         * be zero, and should not be concrete */
        /* check for null */
        //| test TMP1, TMP1;
        //| jz >1;
        dasm_put(Dst, 3884);
#line 2768 "src/jit/x64/emit.dasc"
        /* should be type object */
        //| test_type_object TMP1;
        //| jz >1;
        dasm_put(Dst, 3961, DtE(->header.flags), MVM_CF_TYPE_OBJECT);
#line 2771 "src/jit/x64/emit.dasc"
    }
    /* if we're here, we didn't jump to deopt, so skip it */
    //| jmp >2;
    //|1:
    dasm_put(Dst, 2389);
#line 2775 "src/jit/x64/emit.dasc"
    /* emit deopt */
    //| mov ARG1, TC;
    //| mov ARG2, guard->deopt_offset;
    //| mov ARG3, guard->deopt_target;
    //| callp &MVM_spesh_deopt_one_direct;
    dasm_put(Dst, 3972, guard->deopt_offset, guard->deopt_target);
    dasm_put(Dst, 210, (MVMuint32)((uintptr_t)(&MVM_spesh_deopt_one_direct)), (MVMuint32)((uintptr_t)(&MVM_spesh_deopt_one_direct) >> 32));
    dasm_put(Dst, 216);
#line 2780 "src/jit/x64/emit.dasc"
    /* jump out */
    //| jmp ->exit;
    //|2:
    dasm_put(Dst, 3986);
#line 2783 "src/jit/x64/emit.dasc"
}

void MVM_jit_emit_invoke(MVMThreadContext *tc, MVMJitCompiler *compiler, MVMJitGraph *jg, MVMJitInvoke *invoke) {
    MVMint16 i;
    MVMuint16 callsite_idx = invoke->callsite_idx;
    MVM_jit_log(tc, "Emit invoke (%d args)\n", invoke->arg_count);

    /* The return address for the interpreter */
    //| get_cur_op TMP2;
    //| mov TMP5, TC->cur_frame;
    //| mov aword FRAME:TMP5->return_address, TMP2;
    dasm_put(Dst, 3993, Dt22(->interp_cur_op), Dt22(->cur_frame), Dt2(->return_address));
#line 2794 "src/jit/x64/emit.dasc"

    /* Unless it's a resolve op (in which case we delay a lot of this)... */
    if (!invoke->is_resolve) {
        /* Store callsite in tmp6, which we use at the end of invoke */
        //| mov TMP6, CU->body.callsites;
        //| mov TMP6, CALLSITEPTR:TMP6[callsite_idx];
        dasm_put(Dst, 3365, Dt24(->body.callsites), Dt4([callsite_idx]));
#line 2800 "src/jit/x64/emit.dasc"

        /* Store callsite in the frame. I use TMP5 as it never conflicts
         * with argument passing (like TMP6, but unlike other TMP regs) */
        //| mov FRAME:TMP5->cur_args_callsite, TMP6;
        dasm_put(Dst, 4009, Dt2(->cur_args_callsite));
#line 2804 "src/jit/x64/emit.dasc"

        /* Setup the frame for returning to our current position */
        if (sizeof(MVMReturnType) == 1) {
            //| mov byte FRAME:TMP5->return_type, invoke->return_type;
            dasm_put(Dst, 4014, Dt2(->return_type), invoke->return_type);
#line 2808 "src/jit/x64/emit.dasc"
        } else {
            MVM_panic(1, "JIT: MVMReturnType has unexpected size");
        }

        /* The register for our return value */
        if (invoke->return_type == MVM_RETURN_VOID) {
            //| mov aword FRAME:TMP5->return_value, NULL;
            dasm_put(Dst, 4020, Dt2(->return_value), NULL);
#line 2815 "src/jit/x64/emit.dasc"
        } else {
            //| lea TMP2, WORK[invoke->return_register];
            //| mov aword FRAME:TMP5->return_value, TMP2;
            dasm_put(Dst, 4026, Dt23([invoke->return_register]), Dt2(->return_value));
#line 2818 "src/jit/x64/emit.dasc"
        }
    }

    /* Install invoke args */
    //| mov TMP5, FRAME:TMP5->args;
    dasm_put(Dst, 184, Dt2(->args));
#line 2823 "src/jit/x64/emit.dasc"
    for (i = 0;  i < invoke->arg_count; i++) {
        MVMSpeshIns *ins = invoke->arg_ins[i];
        switch (ins->info->opcode) {
        case MVM_OP_arg_i:
        case MVM_OP_arg_s:
        case MVM_OP_arg_n:
        case MVM_OP_arg_o: {
            MVMint16 dst = ins->operands[0].lit_i16;
            MVMint16 src = ins->operands[1].reg.orig;
            //| mov TMP4, WORK[src];
            //| mov REGISTER:TMP5[dst], TMP4;
            dasm_put(Dst, 4035, Dt23([src]), Dt1([dst]));
#line 2834 "src/jit/x64/emit.dasc"
            break;
        }
        case MVM_OP_argconst_n:
        case MVM_OP_argconst_i: {
            MVMint16 dst = ins->operands[0].lit_i16;
            MVMint64 val = ins->operands[1].lit_i64;
            //| mov64 TMP4, val;
            //| mov REGISTER:TMP5[dst], TMP4;
            dasm_put(Dst, 4044, (unsigned int)(val), (unsigned int)((val)>>32), Dt1([dst]));
#line 2842 "src/jit/x64/emit.dasc"
            break;
        }
        case MVM_OP_argconst_s: {
            MVMint16 dst = ins->operands[0].lit_i16;
            MVMint32 idx = ins->operands[1].lit_str_idx;
            //| get_string TMP4, idx;
             MVM_cu_ensure_string_decoded(tc, jg->sg->sf->body.cu, idx);
#line 2848 "src/jit/x64/emit.dasc"
            //| mov REGISTER:TMP5[dst], TMP4;
            dasm_put(Dst, 4053, Dt24(->body.strings), Dt15([idx]), Dt1([dst]));
#line 2849 "src/jit/x64/emit.dasc"
            break;
        }
        default:
            MVM_panic(1, "JIT invoke: Can't add arg <%s>",
                      ins->info->name);
        }
    }

    if (invoke->is_fast) {
        /* call MVM_frame_invoke_code */
        //| mov ARG1, TC;
        //| mov ARG2, WORK[invoke->code_register_or_name];
        //| mov ARG3, TMP6; // this is the callsite object
        //| mov ARG4, invoke->spesh_cand_or_sf_slot;
        //| callp &MVM_frame_invoke_code;
        dasm_put(Dst, 4066, Dt23([invoke->code_register_or_name]), invoke->spesh_cand_or_sf_slot);
        dasm_put(Dst, 210, (MVMuint32)((uintptr_t)(&MVM_frame_invoke_code)), (MVMuint32)((uintptr_t)(&MVM_frame_invoke_code) >> 32));
        dasm_put(Dst, 216);
#line 2864 "src/jit/x64/emit.dasc"
    } else if (invoke->is_resolve) {
        /* call MVM_spesh_plugin_resolve_jit, which will trampoline out of
         * the JIT-compiled code if need be */
        //| mov ARG1, TC;
        //| get_string ARG2, invoke->code_register_or_name;
        dasm_put(Dst, 324);
         MVM_cu_ensure_string_decoded(tc, jg->sg->sf->body.cu, invoke->code_register_or_name);
#line 2869 "src/jit/x64/emit.dasc"
        //| lea ARG3, WORK[invoke->return_register];
        //| mov ARG4, invoke->resolve_offset;
        //|.if WIN32
        //| get_spesh_slot rax, invoke->spesh_cand_or_sf_slot;
        //| mov ARG5, rax;
        //| mov rax, CU->body.callsites;
        //| mov rax, CALLSITEPTR:rax[callsite_idx];
        //| mov ARG6, rax;
        //|.else
        //| get_spesh_slot ARG5, invoke->spesh_cand_or_sf_slot;
        //| mov ARG6, CU->body.callsites;
        //| mov ARG6, CALLSITEPTR:ARG6[callsite_idx];
        //|.endif
        //| callp &MVM_spesh_plugin_resolve_jit;
        dasm_put(Dst, 4083, Dt24(->body.strings), Dt15([invoke->code_register_or_name]), Dt23([invoke->return_register]), invoke->resolve_offset, Dt22(->cur_frame), Dt2(->effective_spesh_slots), Dt15([invoke->spesh_cand_or_sf_slot]), Dt24(->body.callsites), Dt4([callsite_idx]));
        dasm_put(Dst, 210, (MVMuint32)((uintptr_t)(&MVM_spesh_plugin_resolve_jit)), (MVMuint32)((uintptr_t)(&MVM_spesh_plugin_resolve_jit) >> 32));
        dasm_put(Dst, 216);
#line 2883 "src/jit/x64/emit.dasc"
    } else {
        /* first, save callsite and args */
        //| mov qword [rbp-0x28], TMP5; // args
        //| mov qword [rbp-0x30], TMP6; // callsite
        dasm_put(Dst, 4121);
#line 2887 "src/jit/x64/emit.dasc"
        /* setup call MVM_frame_multi_ok(tc, code, &cur_callsite, args); */
        //| mov ARG1, TC;
        //| mov ARG2, WORK[invoke->code_register_or_name]; // code object
        //| lea ARG3, [rbp-0x30];                          // &cur_callsite
        //| mov ARG4, TMP5;                                // args
        //| mov ARG5, 0;                           // NULL to &was_multi
        //| callp &MVM_frame_find_invokee_multi_ok;
        dasm_put(Dst, 4130, Dt23([invoke->code_register_or_name]));
        dasm_put(Dst, 210, (MVMuint32)((uintptr_t)(&MVM_frame_find_invokee_multi_ok)), (MVMuint32)((uintptr_t)(&MVM_frame_find_invokee_multi_ok) >> 32));
        dasm_put(Dst, 216);
#line 2894 "src/jit/x64/emit.dasc"
        /* restore callsite, args, RV now holds code object */
        //| mov TMP6, [rbp-0x30]; // callsite
        //| mov TMP5, [rbp-0x28]; // args
        dasm_put(Dst, 4154);
#line 2897 "src/jit/x64/emit.dasc"
        /* setup args for call to invoke(tc, code, cur_callsite, args) */
        //| mov ARG1, TC;
        //| mov ARG2, RV;   // code object
        //| mov ARG3, TMP6; // callsite
        //| mov ARG4, TMP5; // args
        dasm_put(Dst, 4163);
#line 2902 "src/jit/x64/emit.dasc"
        /* get the actual function */
        //| mov FUNCTION, OBJECT:RV->st;
        //| mov FUNCTION, STABLE:FUNCTION->invoke;
        //| call FUNCTION;
        dasm_put(Dst, 4177, DtE(->st), Dt12(->invoke));
#line 2906 "src/jit/x64/emit.dasc"
    }
}

void MVM_jit_emit_jumplist(MVMThreadContext *tc, MVMJitCompiler *compiler, MVMJitGraph *jg,
                           MVMJitJumpList *jumplist) {
    MVMint32 i;
    MVM_jit_log(tc, "Emit jumplist (%"PRId64" labels)\n", jumplist->num_labels);
    //| mov TMP1, WORK[jumplist->reg];
    //| cmp TMP1, 0;
    //| jl >2;
    //| cmp TMP1, jumplist->num_labels;
    //| jge >2;
    //| imul TMP1, 0x8; // 8 bytes per goto
    //| lea TMP2, [>1];
    //| add TMP2, TMP1;
    //| jmp TMP2;
    //|.align 8;
    //|1:
    dasm_put(Dst, 4190, Dt23([jumplist->reg]), jumplist->num_labels);
#line 2924 "src/jit/x64/emit.dasc"
    for (i = 0; i < jumplist->num_labels; i++) {
        //|=>(jumplist->in_labels[i]):
        //| jmp =>(jumplist->out_labels[i]);
        //|.align 8;
        dasm_put(Dst, 4232, (jumplist->in_labels[i]), (jumplist->out_labels[i]));
#line 2928 "src/jit/x64/emit.dasc"
    }
    //|2:
    dasm_put(Dst, 321);
#line 2930 "src/jit/x64/emit.dasc"
}

void MVM_jit_emit_control(MVMThreadContext *tc, MVMJitCompiler *compiler,
                          MVMJitControl *ctrl, MVMJitTile *tile) {
    MVMJitControlType type = (tile != NULL ? tile->args[0] : ctrl->type);
    if (type == MVM_JIT_CONTROL_BREAKPOINT) {
        /* Debug breakpoint */
        //| int 3;
        dasm_put(Dst, 4239);
#line 2938 "src/jit/x64/emit.dasc"
    } else {
        MVM_panic(1, "Unknown control code: <%s>", ctrl->ins->info->name);
    }
}


void MVM_jit_emit_load(MVMThreadContext *tc, MVMJitCompiler *compiler,
                       MVMint32 reg_cls, MVMint8 reg_dst,
                       MVMint32 mem_cls, MVMint32 mem_src, MVMint32 size) {
    MVMint8 mem_base;
    if (mem_cls == MVM_JIT_STORAGE_LOCAL) {
        mem_base = MVM_JIT_REG(RBX);
    } else if (mem_cls == MVM_JIT_STORAGE_STACK) {
        mem_base = MVM_JIT_REG(RSP);
    } else {
        MVM_panic(1, "Cannot refer to this memory class: %d", mem_cls);
    }
    if (reg_cls == MVM_JIT_STORAGE_GPR) {
        switch(size) {
        case 1:
            //| mov Rb(reg_dst), byte [Rq(mem_base)+mem_src];
            dasm_put(Dst, 4242, (reg_dst), (mem_base), mem_src);
#line 2959 "src/jit/x64/emit.dasc"
            break;
        case 2:
            //| mov Rw(reg_dst), word [Rq(mem_base)+mem_src];
            dasm_put(Dst, 4253, (reg_dst), (mem_base), mem_src);
#line 2962 "src/jit/x64/emit.dasc"
            break;
        case 4:
            //| mov Rd(reg_dst), dword [Rq(mem_base)+mem_src];
            dasm_put(Dst, 4254, (reg_dst), (mem_base), mem_src);
#line 2965 "src/jit/x64/emit.dasc"
            break;
        case 8:
            //| mov Rq(reg_dst), qword [Rq(mem_base)+mem_src];
            dasm_put(Dst, 4264, (reg_dst), (mem_base), mem_src);
#line 2968 "src/jit/x64/emit.dasc"
            break;
        }
    }
}

void MVM_jit_emit_store(MVMThreadContext *tc, MVMJitCompiler *compiler,
                        MVMint32 mem_cls, MVMint32 mem_dst,
                        MVMint32 reg_cls, MVMint8 reg_src, MVMint32 size) {

    MVMint8 mem_base;
    if (mem_cls == MVM_JIT_STORAGE_LOCAL) {
        mem_base = MVM_JIT_REG(RBX);
    } else if (mem_cls == MVM_JIT_STORAGE_STACK) {
        mem_base = MVM_JIT_REG(RSP);
    } else {
        MVM_panic(1, "Cannot refer to this memory class: %d", mem_cls);
    }
    if (reg_cls == MVM_JIT_STORAGE_GPR) {
        switch (size) {
        case 1:
            //| mov byte [Rq(mem_base)+mem_dst], Rb(reg_src);
            dasm_put(Dst, 4275, (reg_src), (mem_base), mem_dst);
#line 2989 "src/jit/x64/emit.dasc"
            break;
        case 2:
            //| mov word [Rq(mem_base)+mem_dst], Rw(reg_src);
            dasm_put(Dst, 4286, (reg_src), (mem_base), mem_dst);
#line 2992 "src/jit/x64/emit.dasc"
            break;
        case 4:
            //| mov dword [Rq(mem_base)+mem_dst], Rd(reg_src);
            dasm_put(Dst, 4287, (reg_src), (mem_base), mem_dst);
#line 2995 "src/jit/x64/emit.dasc"
            break;
        case 8:
            //| mov qword [Rq(mem_base)+mem_dst], Rq(reg_src);
            dasm_put(Dst, 4297, (reg_src), (mem_base), mem_dst);
#line 2998 "src/jit/x64/emit.dasc"
            break;
        }
    }
}

void MVM_jit_emit_copy(MVMThreadContext *tc, MVMJitCompiler *compiler,
                       MVMint32 dst_cls,  MVMint8 dst_reg, MVMint32 src_cls, MVMint8 src_reg) {
    if (dst_cls == src_cls) {
        if (dst_cls == MVM_JIT_STORAGE_GPR) {
            //| mov Rq(dst_reg), Rq(src_reg);
            dasm_put(Dst, 4308, (src_reg), (dst_reg));
#line 3008 "src/jit/x64/emit.dasc"
        } else {
            MVM_oops(tc, "numeric regs nyi");
        }
    } else {
        MVM_oops(tc, "numeric regs nyi");
    }
}


void MVM_jit_emit_marker(MVMThreadContext *tc, MVMJitCompiler *compiler, MVMint32 num) {
    MVMint32 i;
    for (i = 0; i < num; i++) {
        //| nop;
        dasm_put(Dst, 4317);
#line 3021 "src/jit/x64/emit.dasc"
    }
}


void MVM_jit_emit_data(MVMThreadContext *tc, MVMJitCompiler *compiler, MVMJitData *data) {
    MVMuint8 *bytes = data->data;
    MVMint32 i;
    //|.data;
    dasm_put(Dst, 208);
#line 3029 "src/jit/x64/emit.dasc"
    //|=>(data->label):
    dasm_put(Dst, 195, (data->label));
#line 3030 "src/jit/x64/emit.dasc"
    for (i = 0; i < data->size; i++) {
        //|.byte bytes[i];
        dasm_put(Dst, 2978, bytes[i]);
#line 3032 "src/jit/x64/emit.dasc"
    }
    //|.code
    dasm_put(Dst, 0);
#line 3034 "src/jit/x64/emit.dasc"
}

/* import tiles */
//|.include src/jit/x64/tiles.dasc
#line 1 "src/jit/x64/tiles.dasc"
/* -*-C-*- */
#include "tile_decl.h"

/* NB: The rax/eax/ax/al/ah register is *reserved* for internal use in tiles by
 * the register allocator. Using rax will never overwrite an allocated value */

/* basic memory traffic tiles */
MVM_JIT_TILE_DECL(addr) {
    MVMint8 out  = tile->values[0];
    MVMint8 base = tile->values[1];
    MVMint32 ofs = tile->args[0];
    //| lea Rq(out), [Rq(base)+ofs];
    dasm_put(Dst, 4319, (out), (base), ofs);
#line 13 "src/jit/x64/tiles.dasc"
}


MVM_JIT_TILE_DECL(idx) {
    MVMint8 out  = tile->values[0];
    MVMint8 base = tile->values[1];
    MVMint8 idx  = tile->values[2];
    MVMint8 scl  = tile->args[0];
    if (scl == 8) {
        //| lea Rq(out), [Rq(base)+Rq(idx)*8];
        dasm_put(Dst, 4330, (out), (idx), (base), 0);
#line 23 "src/jit/x64/tiles.dasc"
    } else {
        MVM_oops(tc, "Scales other than 8 NYI\n");
    }
}


MVM_JIT_TILE_DECL(const_reg) {
    MVMint8 out = tile->values[0];
    MVMint64 val  = tile->args[0];
    MVMint32 size = tile->args[1];
    if (size == 8 && !fits_in_32_bit(val)) {
        //| mov64 Rq(out), val;
        dasm_put(Dst, 4344, (out), (unsigned int)(val), (unsigned int)((val)>>32));
#line 35 "src/jit/x64/tiles.dasc"
    } else {
        //| mov Rq(out), val;
        dasm_put(Dst, 4352, (out), val);
#line 37 "src/jit/x64/tiles.dasc"
    }
}


MVM_JIT_TILE_DECL(load_reg) {
    MVMint8 out  = tile->values[0];
    MVMint8 base = tile->values[1];
    MVMint32 size = tile->args[0];
    switch (size) {
    case 1:
        //| mov Rb(out), [Rq(base)];
        dasm_put(Dst, 4360, (out), (base), 0);
#line 48 "src/jit/x64/tiles.dasc"
        break;
    case 2:
        //| mov Rw(out), [Rq(base)];
        dasm_put(Dst, 4253, (out), (base), 0);
#line 51 "src/jit/x64/tiles.dasc"
        break;
    case 4:
        //| mov Rd(out), [Rq(base)];
        dasm_put(Dst, 4254, (out), (base), 0);
#line 54 "src/jit/x64/tiles.dasc"
        break;
    case 8:
        //| mov Rq(out), [Rq(base)];
        dasm_put(Dst, 4264, (out), (base), 0);
#line 57 "src/jit/x64/tiles.dasc"
        break;
    default:
        MVM_oops(tc, "Unsupported load size: %d\n", size);
    }
}

MVM_JIT_TILE_DECL(load_addr) {
    MVMint8 out  = tile->values[0];
    MVMint8 base = tile->values[1];
    MVMint32 ofs  = tile->args[0];
    MVMint32 size = tile->args[1];
    switch (tile->args[1]) {
    case 1:
        //| mov Rb(out), byte [Rq(base)+ofs];
        dasm_put(Dst, 4242, (out), (base), ofs);
#line 71 "src/jit/x64/tiles.dasc"
        break;
    case 2:
        //| mov Rw(out), word [Rq(base)+ofs];
        dasm_put(Dst, 4253, (out), (base), ofs);
#line 74 "src/jit/x64/tiles.dasc"
        break;
    case 4:
        //| mov Rd(out), dword [Rq(base)+ofs];
        dasm_put(Dst, 4254, (out), (base), ofs);
#line 77 "src/jit/x64/tiles.dasc"
        break;
    case 8:
        //| mov Rq(out), qword [Rq(base)+ofs];
        dasm_put(Dst, 4264, (out), (base), ofs);
#line 80 "src/jit/x64/tiles.dasc"
        break;
    default:
        MVM_oops(tc, "Unsupported load size: %d\n", size);
    }
}

MVM_JIT_TILE_DECL(load_idx) {
    MVMint8 out  = tile->values[0];
    MVMint8 base = tile->values[1];
    MVMint8 idx  = tile->values[2];
    MVMint8 scl  = tile->args[0];
    MVMint32 size = tile->args[1];
    if (scl != 8) {
        MVM_oops(tc, "Unsupported scale size: %d\n", scl);
    }
    switch (size) {
    case 1:
        //| mov Rb(out), byte [Rq(base)+Rq(idx)*8];
        dasm_put(Dst, 4370, (out), (idx), (base), 0);
#line 98 "src/jit/x64/tiles.dasc"
        break;
    case 2:
        //| mov Rw(out), word [Rq(base)+Rq(idx)*8];
        dasm_put(Dst, 4384, (out), (idx), (base), 0);
#line 101 "src/jit/x64/tiles.dasc"
        break;
    case 4:
        //| mov Rd(out), dword [Rq(base)+Rq(idx)*8];
        dasm_put(Dst, 4385, (out), (idx), (base), 0);
#line 104 "src/jit/x64/tiles.dasc"
        break;
    case 8:
        //| mov Rq(out), qword [Rq(base)+Rq(idx)*8];
        dasm_put(Dst, 4398, (out), (idx), (base), 0);
#line 107 "src/jit/x64/tiles.dasc"
        break;
    default:
        MVM_oops(tc, "Unsupported load size: %d\n", size);
    }
}


MVM_JIT_TILE_DECL(store) {
    MVMint8 base  = tile->values[1];
    MVMint8 value = tile->values[2];
    MVMint32 size = tile->args[0];
    switch (size) {
    case 1:
        //| mov byte [Rq(base)], Rb(value);
        dasm_put(Dst, 4275, (value), (base), 0);
#line 121 "src/jit/x64/tiles.dasc"
        break;
    case 2:
        //| mov word [Rq(base)], Rw(value);
        dasm_put(Dst, 4286, (value), (base), 0);
#line 124 "src/jit/x64/tiles.dasc"
        break;
    case 4:
        //| mov dword [Rq(base)], Rd(value);
        dasm_put(Dst, 4287, (value), (base), 0);
#line 127 "src/jit/x64/tiles.dasc"
        break;
    case 8:
        //| mov qword [Rq(base)], Rq(value);
        dasm_put(Dst, 4297, (value), (base), 0);
#line 130 "src/jit/x64/tiles.dasc"
        break;
    default:
        MVM_oops(tc, "Unsupported store size: %d\n", size);
    }
}

MVM_JIT_TILE_DECL(store_addr) {
    MVMint8 base  = tile->values[1];
    MVMint8 value = tile->values[2];
    MVMint32 ofs  = tile->args[0];
    MVMint32 size = tile->args[1];
    switch (size) {
    case 1:
        //| mov byte [Rq(base)+ofs], Rb(value);
        dasm_put(Dst, 4275, (value), (base), ofs);
#line 144 "src/jit/x64/tiles.dasc"
        break;
    case 2:
        //| mov word [Rq(base)+ofs], Rw(value);
        dasm_put(Dst, 4286, (value), (base), ofs);
#line 147 "src/jit/x64/tiles.dasc"
        break;
    case 4:
        //| mov dword [Rq(base)+ofs], Rd(value);
        dasm_put(Dst, 4287, (value), (base), ofs);
#line 150 "src/jit/x64/tiles.dasc"
        break;
    case 8:
        //| mov qword [Rq(base)+ofs], Rq(value);
        dasm_put(Dst, 4297, (value), (base), ofs);
#line 153 "src/jit/x64/tiles.dasc"
        break;
    default:
        MVM_oops(tc, "Unsupported store size: %d\n", size);
    }
}

MVM_JIT_TILE_DECL(store_idx) {
    MVMint8 base = tile->values[1];
    MVMint8 idx  = tile->values[2];
    MVMint8 scl  = tile->args[0];
    MVMint32 size = tile->args[1];
    MVMint8 value = tile->values[3];
    if (scl != 8)
        MVM_oops(tc, "Scale %d NYI\n", scl);
    switch (size) {
    case 1:
        //| mov byte [Rq(base)+Rq(idx)*8], Rb(value);
        dasm_put(Dst, 4412, (value), (idx), (base), 0);
#line 170 "src/jit/x64/tiles.dasc"
        break;
    case 2:
        //| mov word [Rq(base)+Rq(idx)*8], Rw(value);
        dasm_put(Dst, 4426, (value), (idx), (base), 0);
#line 173 "src/jit/x64/tiles.dasc"
        break;
    case 4:
        //| mov dword [Rq(base)+Rq(idx)*8], Rd(value);
        dasm_put(Dst, 4427, (value), (idx), (base), 0);
#line 176 "src/jit/x64/tiles.dasc"
        break;
    case 8:
        //| mov qword [Rq(base)+Rq(idx)*8], Rq(value);
        dasm_put(Dst, 4440, (value), (idx), (base), 0);
#line 179 "src/jit/x64/tiles.dasc"
        break;
    default:
        MVM_oops(tc, "Unsupported store size: %d\n", size);
    }
}


MVM_JIT_TILE_DECL(cast) {
    MVMint32 to_size   = tile->args[0];
    MVMint32 from_size = tile->args[1];
    MVMint32 is_signed = tile->args[2];

    MVMint8  to_reg    = tile->values[0];
    MVMint8  from_reg  = tile->values[1];

    /* possible combinations: 1 -> 2, 4, 8; 2 -> 4, 8; 4 -> 8
     * Hence we can combine from_size | (to_size << 3) to get
     * the following options:
     * 1 + 2<<3 == 17
     * 1 + 4<<3 == 33
     * 1 + 8<<3 == 65
     * 2 + 4<<3 == 34
     * 2 + 8<<3 == 66
     * 4 + 8<<3 == 68
     */
    MVMint32 size_conv = (from_size) | (to_size << 3);
    if (is_signed == MVM_JIT_SIGNED) {
        switch (size_conv) {
        case 17:
            //| movsx Rw(to_reg), Rb(from_reg);
            dasm_put(Dst, 4454, (to_reg), (from_reg));
#line 209 "src/jit/x64/tiles.dasc"
            break;
        case 33:
            //| movsx Rd(to_reg), Rb(from_reg);
            dasm_put(Dst, 4455, (to_reg), (from_reg));
#line 212 "src/jit/x64/tiles.dasc"
            break;
        case 34:
            //| movsx Rd(to_reg), Rw(from_reg);
            dasm_put(Dst, 4465, (to_reg), (from_reg));
#line 215 "src/jit/x64/tiles.dasc"
            break;
        case 65:
            //| movsx Rq(to_reg), Rb(from_reg);
            dasm_put(Dst, 4474, (to_reg), (from_reg));
#line 218 "src/jit/x64/tiles.dasc"
            break;
        case 66:
            //| movsx Rq(to_reg), Rw(from_reg);
            dasm_put(Dst, 4484, (to_reg), (from_reg));
#line 221 "src/jit/x64/tiles.dasc"
            break;
        case 68:
            /* movsx is apparantly not defined for double-to-quadword conversions,
             * which forces us to use the rax register like it's 1978. It might be easier
             * to bithack the sign-extension manually, but I'm not sure how.. */
            //| mov eax, Rd(from_reg);
            //| cdqe;
            //| mov Rq(to_reg), rax;
            dasm_put(Dst, 4494, (from_reg), (to_reg));
#line 229 "src/jit/x64/tiles.dasc"
            break;
        default:
            MVM_oops(tc, "Unsupported signed cast %d -> %d\n", from_size, to_size);
        }
    } else {
        switch (size_conv) {
        case 17:
            //| movzx Rw(to_reg), Rb(from_reg);
            dasm_put(Dst, 4508, (to_reg), (from_reg));
#line 237 "src/jit/x64/tiles.dasc"
            break;
        case 33:
            //| movzx Rd(to_reg), Rb(from_reg);
            dasm_put(Dst, 4509, (to_reg), (from_reg));
#line 240 "src/jit/x64/tiles.dasc"
            break;
        case 34:
            //| movzx Rd(to_reg), Rw(from_reg);
            dasm_put(Dst, 4519, (to_reg), (from_reg));
#line 243 "src/jit/x64/tiles.dasc"
            break;
        case 65:
            //| movzx Rq(to_reg), Rb(from_reg);
            dasm_put(Dst, 4528, (to_reg), (from_reg));
#line 246 "src/jit/x64/tiles.dasc"
            break;
        case 66:
            //| movzx Rq(to_reg), Rw(from_reg);
            dasm_put(Dst, 4538, (to_reg), (from_reg));
#line 249 "src/jit/x64/tiles.dasc"
            break;
        case 68:
            /* In contrast, nothing special is necessary to cast unsigned
             * doublewords to quadwords, because using the lower 4 bytes
             * automatically clears the upper 4 */
            //| mov Rd(to_reg), Rd(from_reg);
            dasm_put(Dst, 4548, (from_reg), (to_reg));
#line 255 "src/jit/x64/tiles.dasc"
            break;
        default:
            MVM_oops(tc, "Unsupported unsigned cast %d -> %d\n", from_size, to_size);
        }
    }
}


MVM_JIT_TILE_DECL(cast_load_addr) {
    MVM_oops(tc, "NYI");
}

/* binary operations have special requirements because x86 is two-operand form, e.g:
 * r0 = r0 <op> r1
 * whereas the JIT uses a three-operand model:
 * r0 = r1 <op> r2 */

static void ensure_two_operand_pre(MVMThreadContext *tc, MVMJitCompiler *compiler, MVMJitTile *tile, MVMint8 reg[2]) {
    MVMint8 out = tile->values[0], in1 = tile->values[1], in2 = tile->values[2];
    if (out == in1) {
        reg[0] = in1;
        reg[1] = in2;
    } else if (out == in2) {
        if (MVM_jit_expr_op_is_binary_noncommutative(tc, tile->op)) {
            //| mov rax, Rq(in1);
            dasm_put(Dst, 4556, (in1));
#line 280 "src/jit/x64/tiles.dasc"
            reg[0] = MVM_JIT_ARCH_X64_RAX;
            reg[1] = in2;
        } else {
            /* in this case, r2 <op> r1 == r0 <op> r1 */
            reg[0] = out;
            reg[1] = in1;
        }
    } else {
        /* insert a copy */
        //| mov Rq(out), Rq(in1);
        dasm_put(Dst, 4308, (in1), (out));
#line 290 "src/jit/x64/tiles.dasc"
        /* use r0, r2 */
        reg[0] = out;
        reg[1] = in2;
    }
}

static void ensure_two_operand_post(MVMThreadContext *tc, MVMJitCompiler *compiler, MVMJitTile *tile, MVMint8 reg[2]) {
    MVMint8 out = tile->values[0];
    if (out != reg[0]) {
        /* insert a copy afterwards */
        //| mov Rq(out), Rq(reg[0]);
        dasm_put(Dst, 4308, (reg[0]), (out));
#line 301 "src/jit/x64/tiles.dasc"
    }
}


MVM_JIT_TILE_DECL(add_reg) {
    MVMint8 reg[2];
    ensure_two_operand_pre(tc, compiler, tile, reg);
    //| add Rq(reg[0]), Rq(reg[1]);
    dasm_put(Dst, 4563, (reg[1]), (reg[0]));
#line 309 "src/jit/x64/tiles.dasc"
    ensure_two_operand_post(tc, compiler, tile, reg);
}

MVM_JIT_TILE_DECL(add_const) {
    MVMint8 out = tile->values[0];
    MVMint8 in1  = tile->values[1];
    MVMint64 val = tile->args[0];
    MVMint32 sz  = tile->args[1];
    if (out == in1) {
        if (sz == 8 && !fits_in_32_bit(val)) {
            //| mov64 rax, val;
            //| add Rq(out), rax;
            dasm_put(Dst, 4572, (unsigned int)(val), (unsigned int)((val)>>32), (out));
#line 321 "src/jit/x64/tiles.dasc"
        } else {
            //| add Rq(in1), val;
            dasm_put(Dst, 4583, (in1), val);
#line 323 "src/jit/x64/tiles.dasc"
        }
    } else {
        if (sz == 8 && !fits_in_32_bit(val)) {
            //| mov64 Rq(out), val;
            //| add Rq(out), Rq(in1);
            dasm_put(Dst, 4591, (out), (unsigned int)(val), (unsigned int)((val)>>32), (in1), (out));
#line 328 "src/jit/x64/tiles.dasc"
        } else {
            //| mov Rq(out), Rq(in1);
            //| add Rq(out), val;
            dasm_put(Dst, 4607, (in1), (out), (out), val);
#line 331 "src/jit/x64/tiles.dasc"
        }
    }
}

MVM_JIT_TILE_DECL(add_load_addr) {
    MVMint8 out   = tile->values[0];
    MVMint8 in1   = tile->values[1];
    MVMint8 base  = tile->values[2];
    MVMint32 ofs  = tile->args[0];
    MVMint32 size = tile->args[1];
    if (in1 != out) {
        //| mov Rq(out), Rq(in1);
        dasm_put(Dst, 4308, (in1), (out));
#line 343 "src/jit/x64/tiles.dasc"
    }
    switch (size) {
    case 1:
        //| add Rb(out), byte [Rq(base)+ofs];
        dasm_put(Dst, 4623, (out), (base), ofs);
#line 347 "src/jit/x64/tiles.dasc"
        break;
    case 2:
        //| add Rw(out), word [Rq(base)+ofs];
        dasm_put(Dst, 4634, (out), (base), ofs);
#line 350 "src/jit/x64/tiles.dasc"
        break;
    case 4:
        //| add Rd(out), dword [Rq(base)+ofs];
        dasm_put(Dst, 4635, (out), (base), ofs);
#line 353 "src/jit/x64/tiles.dasc"
        break;
    case 8:
        //| add Rq(out), qword [Rq(base)+ofs];
        dasm_put(Dst, 4645, (out), (base), ofs);
#line 356 "src/jit/x64/tiles.dasc"
        break;
    default:
        MVM_oops(tc, "Unsupported load size: %d\n", size);
    }
}

MVM_JIT_TILE_DECL(add_load_idx) {
    MVMint8 out  = tile->values[0];
    MVMint8 in1  = tile->values[1];
    MVMint8 base = tile->values[2];
    MVMint8 idx  = tile->values[3];
    MVMint32 scl  = tile->args[0];
    MVMint32 size = tile->args[1];
    if (in1 != out) {
        //| mov Rq(out), Rq(in1);
        dasm_put(Dst, 4308, (in1), (out));
#line 371 "src/jit/x64/tiles.dasc"
    }
    if (scl != 8)
        MVM_oops(tc, "IDX Scale %d NYI\n", scl);
    switch (size) {
    case 1:
        //| add Rb(out), byte [Rq(base)+Rq(idx)*8];
        dasm_put(Dst, 4656, (out), (idx), (base), 0);
#line 377 "src/jit/x64/tiles.dasc"
        break;
    case 2:
        //| add Rw(out), word [Rq(base)+Rq(idx)*8];
        dasm_put(Dst, 4670, (out), (idx), (base), 0);
#line 380 "src/jit/x64/tiles.dasc"
        break;
    case 4:
        //| add Rd(out), dword [Rq(base)+Rq(idx)*8];
        dasm_put(Dst, 4671, (out), (idx), (base), 0);
#line 383 "src/jit/x64/tiles.dasc"
        break;
    case 8:
        //| add Rq(out), qword [Rq(base)+Rq(idx)*8];
        dasm_put(Dst, 4684, (out), (idx), (base), 0);
#line 386 "src/jit/x64/tiles.dasc"
        break;
    default:
        MVM_oops(tc, "Unsupported load size: %d\n", size);
    }
}


MVM_JIT_TILE_DECL(and_reg) {
    MVMint8 reg[2];
    ensure_two_operand_pre(tc, compiler, tile, reg);
    //| and Rq(reg[0]), Rq(reg[1]);
    dasm_put(Dst, 4698, (reg[1]), (reg[0]));
#line 397 "src/jit/x64/tiles.dasc"
    ensure_two_operand_post(tc, compiler, tile, reg);
}

MVM_JIT_TILE_DECL(and_const) {
    MVMint8 out = tile->values[0];
    MVMint8 in1  = tile->values[1];
    MVMint64 val = tile->args[0];
    MVMint32 sz  = tile->args[1];
    if (out == in1) {
        if (sz == 8 && !fits_in_32_bit(val)) {
            //| mov64 rax, val;
            //| and Rq(in1), rax;
            dasm_put(Dst, 4707, (unsigned int)(val), (unsigned int)((val)>>32), (in1));
#line 409 "src/jit/x64/tiles.dasc"
        } else {
            //| and Rq(in1), val;
            dasm_put(Dst, 4718, (in1), val);
#line 411 "src/jit/x64/tiles.dasc"
        }
    } else {
        if (sz == 8 && !fits_in_32_bit(val)) {
            //| mov64 Rq(out), val;
            //| and Rq(out), Rq(in1);
            dasm_put(Dst, 4726, (out), (unsigned int)(val), (unsigned int)((val)>>32), (in1), (out));
#line 416 "src/jit/x64/tiles.dasc"
        } else {
            //| mov Rq(out), Rq(in1);
            //| and Rq(out), val;
            dasm_put(Dst, 4742, (in1), (out), (out), val);
#line 419 "src/jit/x64/tiles.dasc"
        }
    }
}

MVM_JIT_TILE_DECL(and_load_addr) {
    MVMint8 out   = tile->values[0];
    MVMint8 in1   = tile->values[1];
    MVMint8 base  = tile->values[2];
    MVMint32 ofs  = tile->args[0];
    MVMint32 size = tile->args[1];
    if (in1 != out) {
        //| mov Rq(out), Rq(in1);
        dasm_put(Dst, 4308, (in1), (out));
#line 431 "src/jit/x64/tiles.dasc"
    }
    switch (size) {
    case 1:
        //| and Rb(out), byte [Rq(base)+ofs];
        dasm_put(Dst, 4758, (out), (base), ofs);
#line 435 "src/jit/x64/tiles.dasc"
        break;
    case 2:
        //| and Rw(out), word [Rq(base)+ofs];
        dasm_put(Dst, 4769, (out), (base), ofs);
#line 438 "src/jit/x64/tiles.dasc"
        break;
    case 4:
        //| and Rd(out), dword [Rq(base)+ofs];
        dasm_put(Dst, 4770, (out), (base), ofs);
#line 441 "src/jit/x64/tiles.dasc"
        break;
    case 8:
        //| and Rq(out), qword [Rq(base)+ofs];
        dasm_put(Dst, 4780, (out), (base), ofs);
#line 444 "src/jit/x64/tiles.dasc"
        break;
    default:
        MVM_oops(tc, "Unsupported load size: %d\n", size);
    }
}

MVM_JIT_TILE_DECL(and_load_idx) {
    MVMint8 out  = tile->values[0];
    MVMint8 in1  = tile->values[1];
    MVMint8 base = tile->values[2];
    MVMint8 idx  = tile->values[3];
    MVMint32 scl  = tile->args[0];
    MVMint32 size = tile->args[1];

    if (out != in1) {
        //| mov Rq(out), Rq(in1);
        dasm_put(Dst, 4308, (in1), (out));
#line 460 "src/jit/x64/tiles.dasc"
    }
    if (scl != 8)
        MVM_oops(tc, "IDX Scale %d NYI\n", scl);
    switch (size) {
    case 1:
        //| and Rb(out), byte [Rq(base)+Rq(idx)*8];
        dasm_put(Dst, 4791, (out), (idx), (base), 0);
#line 466 "src/jit/x64/tiles.dasc"
        break;
    case 2:
        //| and Rw(out), word [Rq(base)+Rq(idx)*8];
        dasm_put(Dst, 4805, (out), (idx), (base), 0);
#line 469 "src/jit/x64/tiles.dasc"
        break;
    case 4:
        //| and Rd(out), dword [Rq(base)+Rq(idx)*8];
        dasm_put(Dst, 4806, (out), (idx), (base), 0);
#line 472 "src/jit/x64/tiles.dasc"
        break;
    case 8:
        //| and Rq(out), qword [Rq(base)+Rq(idx)*8];
        dasm_put(Dst, 4819, (out), (idx), (base), 0);
#line 475 "src/jit/x64/tiles.dasc"
        break;
    default:
        MVM_oops(tc, "Unsupported load size: %d\n", size);
    }
}

MVM_JIT_TILE_DECL(or_reg) {
    MVMint8 reg[2];
    ensure_two_operand_pre(tc, compiler, tile, reg);
    //| or Rq(reg[0]), Rq(reg[1]);
    dasm_put(Dst, 4833, (reg[1]), (reg[0]));
#line 485 "src/jit/x64/tiles.dasc"
    ensure_two_operand_post(tc, compiler, tile, reg);
}

MVM_JIT_TILE_DECL(xor_reg) {
    MVMint8 reg[2];
    ensure_two_operand_pre(tc, compiler, tile, reg);
    //| xor Rq(reg[0]), Rq(reg[1]);
    dasm_put(Dst, 4842, (reg[1]), (reg[0]));
#line 492 "src/jit/x64/tiles.dasc"
    ensure_two_operand_post(tc, compiler, tile, reg);
}

MVM_JIT_TILE_DECL(not_reg) {
    MVMint8 out = tile->values[0];
    MVMint8 in  = tile->values[1];
    if (out != in) {
        //| mov Rq(out), Rq(in);
        dasm_put(Dst, 4308, (in), (out));
#line 500 "src/jit/x64/tiles.dasc"
    }
    //| not Rq(out);
    dasm_put(Dst, 4851, (out));
#line 502 "src/jit/x64/tiles.dasc"
}

MVM_JIT_TILE_DECL(sub_reg) {
    MVMint8 reg[2];
    ensure_two_operand_pre(tc, compiler, tile, reg);
    //| sub Rq(reg[0]), Rq(reg[1]);
    dasm_put(Dst, 4859, (reg[1]), (reg[0]));
#line 508 "src/jit/x64/tiles.dasc"
    ensure_two_operand_post(tc, compiler, tile, reg);
}

MVM_JIT_TILE_DECL(sub_const) {
    MVMint8 out = tile->values[0];
    MVMint8 in1  = tile->values[1];
    MVMint64 val = tile->args[0];
    MVMint32 sz  = tile->args[1];
    if (out == in1) {
        if (sz == 8 && !fits_in_32_bit(val)) {
            //| mov64 rax, val;
            //| sub Rq(in1), rax;
            dasm_put(Dst, 4868, (unsigned int)(val), (unsigned int)((val)>>32), (in1));
#line 520 "src/jit/x64/tiles.dasc"
        } else {
            //| sub Rq(in1), val;
            dasm_put(Dst, 4879, (in1), val);
#line 522 "src/jit/x64/tiles.dasc"
        }
    } else {
        if (sz == 8 && !fits_in_32_bit(val)) {
            //| mov64 rax, val;
            //| mov Rq(out), Rq(in1);
            //| sub Rq(out), rax;
            dasm_put(Dst, 4888, (unsigned int)(val), (unsigned int)((val)>>32), (in1), (out), (out));
#line 528 "src/jit/x64/tiles.dasc"
        } else {
            //| mov Rq(out), Rq(in1);
            //| sub Rq(out), val;
            dasm_put(Dst, 4907, (in1), (out), (out), val);
#line 531 "src/jit/x64/tiles.dasc"
        }
    }
}

MVM_JIT_TILE_DECL(sub_load_addr) {
    MVMint8 out   = tile->values[0];
    MVMint8 in1   = tile->values[1];
    MVMint8 base  = tile->values[2];
    MVMint32 ofs  = tile->args[0];
    MVMint32 size = tile->args[1];
    if (in1 != out) {
        //| mov Rq(out), Rq(in1);
        dasm_put(Dst, 4308, (in1), (out));
#line 543 "src/jit/x64/tiles.dasc"
    }
    switch (size) {
    case 1:
        //| sub Rb(out), byte [Rq(base)+ofs];
        dasm_put(Dst, 4924, (out), (base), ofs);
#line 547 "src/jit/x64/tiles.dasc"
        break;
    case 2:
        //| sub Rw(out), word [Rq(base)+ofs];
        dasm_put(Dst, 4935, (out), (base), ofs);
#line 550 "src/jit/x64/tiles.dasc"
        break;
    case 4:
        //| sub Rd(out), dword [Rq(base)+ofs];
        dasm_put(Dst, 4936, (out), (base), ofs);
#line 553 "src/jit/x64/tiles.dasc"
        break;
    case 8:
        //| sub Rq(out), qword [Rq(base)+ofs];
        dasm_put(Dst, 4946, (out), (base), ofs);
#line 556 "src/jit/x64/tiles.dasc"
        break;
    default:
        MVM_oops(tc, "Unsupported load size: %d\n", size);
    }
}

MVM_JIT_TILE_DECL(sub_load_idx) {
    MVMint8 out  = tile->values[0];
    MVMint8 in1  = tile->values[1];
    MVMint8 base = tile->values[2];
    MVMint8 idx  = tile->values[3];
    MVMint32 scl  = tile->args[0];
    MVMint32 size = tile->args[1];
    if (out != in1) {
        //| mov Rq(out), Rq(in1);
        dasm_put(Dst, 4308, (in1), (out));
#line 571 "src/jit/x64/tiles.dasc"
    }
    if (scl != 8)
        MVM_oops(tc, "IDX Scale %d NYI\n", scl);
    switch (size) {
    case 1:
        //| sub Rb(out), byte [Rq(base)+Rq(idx)*8];
        dasm_put(Dst, 4957, (out), (idx), (base), 0);
#line 577 "src/jit/x64/tiles.dasc"
        break;
    case 2:
        //| sub Rw(out), word [Rq(base)+Rq(idx)*8];
        dasm_put(Dst, 4971, (out), (idx), (base), 0);
#line 580 "src/jit/x64/tiles.dasc"
        break;
    case 4:
        //| sub Rd(out), dword [Rq(base)+Rq(idx)*8];
        dasm_put(Dst, 4972, (out), (idx), (base), 0);
#line 583 "src/jit/x64/tiles.dasc"
        break;
    case 8:
        //| sub Rq(out), qword [Rq(base)+Rq(idx)*8];
        dasm_put(Dst, 4985, (out), (idx), (base), 0);
#line 586 "src/jit/x64/tiles.dasc"
        break;
    default:
        MVM_oops(tc, "Unsupported load size: %d\n", size);
    }
}




MVM_JIT_TILE_DECL(test) {
    MVMint8 reg = tile->values[1];
    switch (tile->size) {
    case 1:
        //| test Rb(reg), Rb(reg);
        dasm_put(Dst, 4999, (reg), (reg));
#line 600 "src/jit/x64/tiles.dasc"
        break;
    case 2:
        //| test Rw(reg), Rw(reg);
        dasm_put(Dst, 5008, (reg), (reg));
#line 603 "src/jit/x64/tiles.dasc"
        break;
    case 4:
        //| test Rd(reg), Rd(reg);
        dasm_put(Dst, 5009, (reg), (reg));
#line 606 "src/jit/x64/tiles.dasc"
        break;
    case 8:
    default:
        /* NB - this is a hack, because we don't assign a size to the result of
         * CALL, its size would be 0, and we'd have nothing compiled. Better fix
         * would be to assign a result size to CALL. */
        //| test Rq(reg), Rq(reg);
        dasm_put(Dst, 5017, (reg), (reg));
#line 613 "src/jit/x64/tiles.dasc"
        break;
    }
}



MVM_JIT_TILE_DECL(test_addr) {
    MVMint8 base  = tile->values[1];
    MVMint32 ofs  = tile->args[0];
    MVMint32 size = tile->args[1];
    switch (size) {
    case 1:
        //| cmp byte [Rq(base)+ofs], 0;
        dasm_put(Dst, 5026, (base), ofs);
#line 626 "src/jit/x64/tiles.dasc"
        break;
    case 2:
        //| cmp word [Rq(base)+ofs], 0;
        dasm_put(Dst, 5036, (base), ofs);
#line 629 "src/jit/x64/tiles.dasc"
        break;
    case 4:
        //| cmp dword [Rq(base)+ofs], 0;
        dasm_put(Dst, 5037, (base), ofs);
#line 632 "src/jit/x64/tiles.dasc"
        break;
    case 8:
        //| cmp qword [Rq(base)+ofs], 0;
        dasm_put(Dst, 5046, (base), ofs);
#line 635 "src/jit/x64/tiles.dasc"
        break;
    default:
        MVM_oops(tc, "Unsupported size %d for load\n", size);
    }
}


MVM_JIT_TILE_DECL(test_idx) {
    MVMint8 base = tile->values[1];
    MVMint8 idx  = tile->values[2];
    MVMint32 scl = tile->args[0];
    MVMint32 size = tile->args[1];
    if (scl != 8)
        MVM_oops(tc, "Scale %d NYI\n", scl);
    switch(size) {
    case 1:
        //| cmp byte [Rq(base)+Rq(idx)*8], 0;
        dasm_put(Dst, 5056, (idx), (base), 0);
#line 652 "src/jit/x64/tiles.dasc"
        break;
    case 2:
        //| cmp word [Rq(base)+Rq(idx)*8], 0;
        dasm_put(Dst, 5069, (idx), (base), 0);
#line 655 "src/jit/x64/tiles.dasc"
        break;
    case 4:
        //| cmp dword [Rq(base)+Rq(idx)*8], 0;
        dasm_put(Dst, 5070, (idx), (base), 0);
#line 658 "src/jit/x64/tiles.dasc"
        break;
    case 8:
        //| cmp qword [Rq(base)+Rq(idx)*8], 0;
        dasm_put(Dst, 5082, (idx), (base), 0);
#line 661 "src/jit/x64/tiles.dasc"
        break;
    default:
        MVM_oops(tc, "Unsupported size %d for load\n", tile->size);
    }
}

MVM_JIT_TILE_DECL(test_and) {
    MVMint8 rega = tile->values[1];
    MVMint8 regb = tile->values[2];
    switch(tile->size) {
    case 1:
        //| test Rb(regb), Rb(rega);
        dasm_put(Dst, 4999, (rega), (regb));
#line 673 "src/jit/x64/tiles.dasc"
        break;
    case 2:
        //| test Rw(regb), Rw(rega);
        dasm_put(Dst, 5008, (rega), (regb));
#line 676 "src/jit/x64/tiles.dasc"
        break;
    case 4:
        //| test Rd(regb), Rd(rega);
        dasm_put(Dst, 5009, (rega), (regb));
#line 679 "src/jit/x64/tiles.dasc"
        break;
    case 8:
        //| test Rq(regb), Rq(rega);
        dasm_put(Dst, 5017, (rega), (regb));
#line 682 "src/jit/x64/tiles.dasc"
        break;
    }
}

MVM_JIT_TILE_DECL(test_const) {
    MVMint8  reg = tile->values[1];
    MVMint64 val = tile->args[0];
    switch(tile->size) {
    case 1:
        //| test Rb(reg), val;
        dasm_put(Dst, 5095, (reg), val);
#line 692 "src/jit/x64/tiles.dasc"
        break;
    case 2:
        //| test Rw(reg), val;
        dasm_put(Dst, 5104, (reg), val);
#line 695 "src/jit/x64/tiles.dasc"
        break;
    case 4:
        //| test Rd(reg), val;
        dasm_put(Dst, 5113, (reg), val);
#line 698 "src/jit/x64/tiles.dasc"
        break;
    case 8:
        if (fits_in_32_bit(val)) {
            //| test Rq(reg), val;
            dasm_put(Dst, 5121, (reg), val);
#line 702 "src/jit/x64/tiles.dasc"
        } else {
            //| mov64 rax, val;
            //| test Rq(reg), rax;
            dasm_put(Dst, 5130, (unsigned int)(val), (unsigned int)((val)>>32), (reg));
#line 705 "src/jit/x64/tiles.dasc"
        }
        break;
    }
}

MVM_JIT_TILE_DECL(test_addr_const) {
    MVMint8  reg = tile->values[1];
    /* args: $ofs $lsize $val $csize */
    MVMint32 ofs = tile->args[0];
    MVMint64 val = tile->args[2];
    switch(tile->size) {
    case 1:
        //| test byte [Rq(reg)+ofs], val;
        dasm_put(Dst, 5141, (reg), ofs, val);
#line 718 "src/jit/x64/tiles.dasc"
        break;
    case 2:
        //| test word [Rq(reg)+ofs], val;
        dasm_put(Dst, 5152, (reg), ofs, val);
#line 721 "src/jit/x64/tiles.dasc"
        break;
    case 4:
        //| test dword [Rq(reg)+ofs], val;
        dasm_put(Dst, 5163, (reg), ofs, val);
#line 724 "src/jit/x64/tiles.dasc"
        break;
    case 8:
        if (fits_in_32_bit(val)) {
            //| test qword [Rq(reg)+ofs], val;
            dasm_put(Dst, 5173, (reg), ofs, val);
#line 728 "src/jit/x64/tiles.dasc"
        } else {
            //| mov64 rax, val;
            //| test qword [Rq(reg)+ofs], rax;
            dasm_put(Dst, 5184, (unsigned int)(val), (unsigned int)((val)>>32), (reg), ofs);
#line 731 "src/jit/x64/tiles.dasc"
        }
        break;
    }
}


MVM_JIT_TILE_DECL(cmp) {
    MVMint8 regl = tile->values[1];
    MVMint8 regr = tile->values[2];
    switch (tile->size) {
    case 1:
        //| cmp Rb(regl), Rb(regr);
        dasm_put(Dst, 5197, (regr), (regl));
#line 743 "src/jit/x64/tiles.dasc"
        break;
    case 2:
        //| cmp Rw(regl), Rw(regr);
        dasm_put(Dst, 5206, (regr), (regl));
#line 746 "src/jit/x64/tiles.dasc"
        break;
    case 4:
        //| cmp Rd(regl), Rd(regr);
        dasm_put(Dst, 5207, (regr), (regl));
#line 749 "src/jit/x64/tiles.dasc"
        break;
    case 8:
        //| cmp Rq(regl), Rq(regr);
        dasm_put(Dst, 5215, (regr), (regl));
#line 752 "src/jit/x64/tiles.dasc"
        break;
    }
}

MVM_JIT_TILE_DECL(flagval) {
    MVMint8 out = tile->values[0];
    MVMint32 child = tree->nodes[tile->node + 1];
    MVMint32 flag  = tree->nodes[child];
    switch (flag) {
    case MVM_JIT_LT:
        //| setl Rb(out);
        dasm_put(Dst, 5224, (out));
#line 763 "src/jit/x64/tiles.dasc"
        break;
    case MVM_JIT_LE:
        //| setle Rb(out);
        dasm_put(Dst, 5232, (out));
#line 766 "src/jit/x64/tiles.dasc"
        break;
    case MVM_JIT_ZR:
    case MVM_JIT_EQ:
        //| setz Rb(out);
        dasm_put(Dst, 5240, (out));
#line 770 "src/jit/x64/tiles.dasc"
        break;
    case MVM_JIT_NZ:
    case MVM_JIT_NE:
        //| setnz Rb(out);
        dasm_put(Dst, 5248, (out));
#line 774 "src/jit/x64/tiles.dasc"
        break;
    case MVM_JIT_GE:
        //| setge Rb(out);
        dasm_put(Dst, 5256, (out));
#line 777 "src/jit/x64/tiles.dasc"
        break;
    case MVM_JIT_GT:
        //| setg Rb(out);
        dasm_put(Dst, 5264, (out));
#line 780 "src/jit/x64/tiles.dasc"
        break;
    default:
        MVM_panic(1, "No flagval possible");
        break;
    }
    /* XXX THIS IS A HACK

     * The size cast is supposed to be applied by the expression template
     * builder, but that subtly doesn't work (it's not applied for STORE
     * operands, and when it is, it causes even subtler errors with CONST
     * arguments. (const_i64_16 returns a 64 bit signed integer as a 16 bit
     * signed integer argument, and currently CONST doesn't have a sign, and the
     * tile yielding the value (fortunately) doesn't respect the size. */
    //| movzx Rq(out), Rb(out);
    dasm_put(Dst, 4528, (out), (out));
#line 794 "src/jit/x64/tiles.dasc"
}


MVM_JIT_TILE_DECL(mark) {
    MVMint32 label = tile->args[0];
    //|=>(label):
    dasm_put(Dst, 195, (label));
#line 800 "src/jit/x64/tiles.dasc"
}

MVM_JIT_TILE_DECL(label) {
    MVMint8 reg = tile->values[0];
    MVMint32 label = tile->args[0];
    //| lea Rq(reg), [=>label];
    dasm_put(Dst, 5272, (reg), label);
#line 806 "src/jit/x64/tiles.dasc"
}

MVM_JIT_TILE_DECL(branch_label) {
    MVMint32 label = tile->args[0];
    if (label >= 0) {
        //| jmp =>(label);
        dasm_put(Dst, 3654, (label));
#line 812 "src/jit/x64/tiles.dasc"
    } else {
        //| jmp ->exit;
        dasm_put(Dst, 3649);
#line 814 "src/jit/x64/tiles.dasc"
    }
}



static void move_call_value(MVMThreadContext *tc, MVMJitCompiler *compiler, MVMJitTile *tile) {
    if (MVM_JIT_TILE_YIELDS_VALUE(tile)) {
        MVMint8 out = tile->values[0];
        //| mov Rq(out), rax;
        dasm_put(Dst, 4501, (out));
#line 823 "src/jit/x64/tiles.dasc"
    }
}

MVM_JIT_TILE_DECL(call) {
    MVMint8 reg = tile->values[1];
    //| call Rq(reg);
    dasm_put(Dst, 5280, (reg));
#line 829 "src/jit/x64/tiles.dasc"
    move_call_value(tc, compiler, tile);
}

MVM_JIT_TILE_DECL(call_func) {
    MVMint64 ptr = tile->args[0];
    //| callp ptr;
    dasm_put(Dst, 208);
    dasm_put(Dst, 210, (MVMuint32)((uintptr_t)(ptr)), (MVMuint32)((uintptr_t)(ptr) >> 32));
    dasm_put(Dst, 216);
#line 835 "src/jit/x64/tiles.dasc"
    move_call_value(tc, compiler, tile);
}


MVM_JIT_TILE_DECL(call_addr) {
    MVMint8  reg = tile->values[1];
    MVMint32 ofs = tile->args[0];
    //| call qword [Rq(reg)+ofs];
    dasm_put(Dst, 5287, (reg), ofs);
#line 843 "src/jit/x64/tiles.dasc"
    move_call_value(tc, compiler, tile);
}

Coverage Report

Created: 2018-07-03 15:31